Method of forming an interlayer insulating film

Details Method of forming an interlayer insulating film Method of forming an interlayer insulating film

1996-02-14

1999-11-16

Bowers, Charles

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

438672, 438693, 438791, 438758, H01L 2131

Patent

active

059857692

ABSTRACT:
A method of forming an uniform interlayer insulating film on a substrate of large size is provided. A semiconductor substrate is prepared which has an interconnection pattern formed thereon. A silicon oxide film is formed on the semiconductor substrate to cover the interconnection pattern by chemical vapor deposition method using mixed gas including gas having silicon atoms and hydrogen peroxide. A molar ratio of gas having silicon atoms to hydrogen peroxide is adjusted to be within the range of from 1:2 to 1:4.

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patent: 5703404 (1997-12-01), Matsuura
"Novel Self Planarizing CVD Oxide for Interlayer Dielectric Applicatons," by M. Matsuura et al., Technical Digest of IEDM 1994.
"Planarisation for Sub-Micron Devices Utilising a New Chemistry," by A. Kiermasz et al., Proceedings of DUMIC Conference 1995.
Homma et al., "A Room Temperature Chemical Vapor Deposition SiOF Film Formation Technology for the Interlayer in Submicron Multilevel Interconnections", J. Electrochem. Soc., vol. 140, No.3, Mar. 1993, pp. 687-692.
Matsuura et al., "Novel Self-planarizing CVD Oxide for Interlayer Dielectric Applications", IEEE, 1994, pp. 117-120.
Kim et al., "Low Pressure Chemical Vapor Deposition of Silicon Dioxide Films by Thermal Decomposition of Tetra-alkoxysilanes", J. Electronchem. Soc., vol. 142, No. 2, Feb. 1995, pp. 676-682.
Tetsuya Homma et al., "A Room Temperature Chemical Vapor Deposition SiOF Film Formation Technology for the Interlayer in Submicron Multilevel Interconnections", J. Electrom. Soc., vol. 140, No. 3, Mar. 1993, pp. 687-692

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