Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2007-02-23
2009-11-24
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S691000, C438S692000, C438S714000, C438S720000, C438S723000, C257SE21485
Reexamination Certificate
active
07622391
ABSTRACT:
A method of forming a semiconductor structure comprises providing a semiconductor structure comprising a layer of a dielectric material provided over an electrically conductive feature. An opening is formed in the layer of dielectric material. The opening is located over the electrically conductive feature and has a first lateral dimension. A cavity is formed in the electrically conductive feature. The cavity has a second lateral dimension being greater than the first lateral dimension. The cavity and the opening are filled with an electrically conductive material.
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Translation of Official Communication from German Patent Office for German Patent Application No. 10 2006 035 645.4-33 dated Dec. 22, 2007.
Frohberg Kai
Qing Su Ruo
Werner Thomas
Advanced Micro Devices , Inc.
Fourson George
Parker John M
Williams Morgan & Amerson P.C.
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