Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into...
Reexamination Certificate
2001-05-08
2003-07-01
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
C438S514000, C438S522000, C438S529000, C438S542000, C438S983000
Reexamination Certificate
active
06586317
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming a zener diode and, more particularly, to a method of forming a zener diode in a npn and pnp bipolar process flow that requires no additional steps to set the reverse breakdown voltage of the zener diode to any voltage within a range of voltages.
2. Description of the Related Art
A zener diode is a p-n junction device that allows substantially no current flow through the diode when the diode is reverse biased (when the voltage on the n region of the diode is greater than the voltage on the p region of the diode.) However, when the n-to-p voltage difference is positive and exceeds a reverse breakdown voltage, a large breakdown current flows through the diode.
The magnitude of the reverse breakdown voltage, in turn, is a function of the relative doping concentrations of the n and p regions of the diode. Thus, by varying the relative doping concentrations, the reverse breakdown voltage can be set to any voltage within a range of voltages.
Zener diodes are commonly formed in a semiconductor process that utilizes a separate doping step to define the relative doping concentrations. The separate doping step typically forms the n or the p region of the diode, or adds a predefined amount of dopant to an existing n or p region, to thereby define the reverse breakdown voltage of the diode.
Zener diodes have a number of uses in semiconductor integrated circuits, including in an electrostatic discharge (ESD) protection circuit that provides ESD protection for variable power supply lines.
FIG. 1
shows a circuit diagram that illustrates a conventional ESD protection circuit
100
.
As shown in
FIG. 1
, circuit
100
includes a zener clamp diode
110
, a npn transistor
112
, and a resistor
114
. Transistor
112
has a collector connected to a power supply line
116
, a base connected to diode
110
and resistor
114
, and an emitter connected to ground. Diode
110
also has a connection to power supply line
116
, while resistor
114
also has a connection to ground.
In operation, when the voltage on power supply line
116
is less than the reverse breakdown voltage, essentially no current flows through diode
110
. As a result, ground is on the base of transistor
112
, thereby turning off transistor
112
. When the voltage on power supply line
116
exceeds the reverse breakdown voltage, such as when a human body model (HBM) pulse is applied to line
116
, a current flows through diode
110
and resistor
114
, thereby placing a voltage on the base of transistor
112
. The voltage on the base of transistor
112
, in turn, turns on transistor
112
, thereby allowing a collector current IC to flow into the collector, and an emitter current IE to flow out of the emitter, of transistor
112
.
Although the separate doping step described above is conventionally utilized to form a zener diode, the need for a separate doping step increases the cost and complexity of the fabrication process. Thus, there is a need for a method of forming a zener diode that allows the reverse breakdown voltage to be set to any voltage within a range of voltages without requiring a separate doping step.
SUMMARY OF THE INVENTION
The present invention provides a method of forming a zener diode. The method allows the reverse breakdown voltage of the diode to be set by modifying the existing steps in a bipolar or BiCMOS fabrication process. The present method provides both a high tunable breakdown voltage range and a simple realization.
The method of the present invention begins with the step of forming a first zener region of a first conductivity type in a semiconductor material. The method also includes the steps of forming a second zener region of a second conductivity type in the substrate in the first zener region, and forming a layer of epitaxial material on the semiconductor material. The layer of epitaxial material has a surface, a first region that extends from the surface to the first zener region, and a second region that extends from the surface to the second zener region. The method also includes the step of doping the layer of epitaxial material so that the first region has the first conductivity type and the second region has the second conductivity type.
The method can also include the step of forming first and second transistor buried regions of the first and second conductivity types, respectively, in the semiconductor material. In addition, the method can form a third region of the first conductivity type in the epitaxial layer that extends from the surface to the first transistor buried region.
Further, a fourth region of the second conductivity type is formed in the epitaxial layer to extend from the surface to the second transistor buried region. The method can also form a first base of a second conductivity type that contacts the third region of the epitaxial layer; and a second base of a first conductivity type that contacts the fourth region of the epitaxial layer.
The present invention also provides a semiconductor device that includes a first zener region of a first conductivity type that is formed in a substrate, and a second zener region of the second conductivity type that is formed in the substrate in the first zener region. The semiconductor device also includes an epitaxial layer that is formed on the substrate. The epitaxial layer has a surface, a first region of the first conductivity type that extends from the surface to the first zener region, and a second region of the second conductivity type that extends from the surface to the second zener region.
The semiconductor device can also include a first isolation region of the first conductivity type that is formed in the substrate apart from the zener region. The semiconductor device can further include a first buried region of the first conductivity type that is formed in the substrate in the first isolation region, and a second buried region of the second conductivity type that is formed in the substrate.
The semiconductor device can additionally include, in the epitaxial layer, a third region of the first conductivity type that extends from the surface to the first buried region, and a fourth region of the second conductivity type that extends from the surface to the second buried region. In addition, a first base region of the second conductivity type contacts the third region of the epitaxial layer, and a second base region of the first conductivity type contacts the fourth region of the epitaxial layer.
A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description and accompanying drawings that set forth an illustrative embodiment in which the principles of the invention are utilized.
REFERENCES:
patent: 5807780 (1998-09-01), Davis et al.
patent: 5856695 (1999-01-01), Ito et al.
patent: 5892264 (1999-04-01), Davis et al.
patent: 5994755 (1999-11-01), DeJong et al.
patent: 6057578 (2000-05-01), Aiello et al.
patent: 6194761 (2001-02-01), Chiozzi et al.
patent: 6365932 (2002-04-01), Kouno et al.
patent: 6441445 (2002-08-01), Leonardi et al.
Hopper Peter
Strachan Andy
Vashchenko Vladislav
National Semiconductor Corporation
Pickering Mark C.
Rocchegiani Renzo N.
Smith Matthew
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