Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-03-09
2001-11-27
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S660000, C438S661000, C438S678000, C438S687000, C438S637000
Reexamination Certificate
active
06323120
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention concerns formation of a wiring film in a production process of semiconductors typically represented by ULSI and, more in particular, it relates to a method of forming a film of a wiring material of copper or copper alloy by a electrolytic plating method and, further, heat treating the film in a high pressure/high temperature gas atmosphere thereby filling the holes in a connection portion or wiring trenches with a material for the wiring film and obtaining good adhesion.
2. Related Art Statement
Japanese Patent No. 2660040 (registered on Jun. 6, 1997) discloses “a vacuum film forming method comprising a step of forming a thin metal film on a substrate having concave portions by a vacuum thin film forming method such as a sputtering method, CVD process or vacuum vapor deposition process, a step of heating and fluidizing the entire thin metal film formed on the substrate and a step of pressurizing the metal of the fluidized thin metal film with a gas and filling the metal of the thin metal film into the concave portions so as not to form voids in the concave portion”.
Further, Japanese Patent Publication No. Hei 7-193063 discloses a method of treating an article having a surface and having at least one concave portion within the surface, the method includes forming a layer on at least a portion of the surface, the layer extending over the concave portion and, further, exposing the article and the layer to high pressure and high temperature enough to deform a portion of the layer so as to fill the concave portion”.
This prior publication describes that the article is a semiconductor wafer and the concave portion comprises, for example, holes, trenches and viaholes formed to the semiconductor wafer and the layer is made of a metal such as aluminum.
Further, it also discloses that, in a case where the layer is made of aluminum, the temperature is from 350 to 650° C. and the pressure is at 3,000 psi or higher, a gas can also be used for pressurization and it is necessary that the layer formed over the hole or the groove has a thickness at least equal with the width of the hole.
Further, it describes that even when a semiconductor wafer itself includes a plurality of layers of different characteristics, it can be produced as a result of a production process including a plurality of steps for forming them.
As described above, the known prior arts disclose that squeezing or introducing the material by high pressure at a high temperature is effective as a method of filling voids formed in the holes or trenches for improvement of the electro-conductivity of the wiring film (mainly) of semiconductors.
However, the Al wiring films shown by the prior literatures have come to their limit in view of the electron migration (EM) resistance or lowering of electric resistance required along with finer/higher integration of ULSI in the feature. While Cu has been expected recently as being excellent over Al with respect to the situations described above, since the conditions for film formation and the film structure after film formation of Cu greatly differ from those of Al and no comparable effect can be obtained if the prior art described above is applied as it is.
Particularly, with respect to the copper wiring film, since it is difficult for line fabrication by etching after forming the wiring film by the PVD method as in the Al wiring film, a method of previously forming trenches in the insulation film, in which the material for the copper wiring film is filled and then scraping off by grinding to form wirings has been adopted. Further, in this case, an electrolytic plating method is considered advantageous in view of the cost and the productivity and many semiconductor manufacturers have earnestly intended for the establishment of the technique. Further, the electrolytic plating method has advantages that the electrolytic plating is a low temperature process carried out near the room temperature and enables combination with an organic series material having a heat resistance at 350 to 380° C. and considered as a promising candidate with regard to the subject of lowering the dielectric constant of the insulation film material, which is considered important along with temperature lowering of the wiring film material.
The present inventors have made a study based on experiments or the like by applying such prior art to copper series wiring films, particularly, copper wiring films formed by electrolytic plating method, found several problems and have reached the present invention.
OBJECT OF THE INVENTION
A first subject of the present invention resides in that a copper wiring formed by an electrolytic plating method has a small crystal grain size and causes crystal grain growth, when left, even at a room temperature to lower the electric resistance therealong, but lacks in stability. For stabilization, it is necessary for annealing at a temperature of 300 to 380° C.
A second subject resides in that nano-scale pores between the crystal grains are coagulated to form large voids upon annealing, to often result in disconnected portions in the aimed wiring structure.
Further, a third subject resides in that while no problems occur if holes such as contact holes or trenches are filled only with copper over the entire area of a semiconductor substrate, an electrolyte solution often remains in the holes and the water ingredient in the electrolyte solution boils during annealing to break the copper wiring film and that the broken powder forms powdery dusts of particles.
Further, when the present inventors have applied a method similar to that shown in the prior art of conducting processing under high temperature/high pressure gas atmosphere to a Si substrate formed with a Cu wiring film formed by the electrolytic plating method, it has been found that while large voids are eliminated at a relatively low temperature of 350° C. and at a pressure of about 120 MPa, spherical pores and the like due to the plating solution remained in the holes tend to be left as they are. It has also been found that for suppressing the formation of the spherical pores and the like, it is inevitable to elevate the temperature upon processing under a high temperature/high pressure gas atmosphere to 450° C. or higher, or make the retention time longer such as 2 hours or more.
On the other hand, when the present inventors have applied processing to the Cu wiring film formed only by the PVD method under a high temperature/high pressure gas atmosphere, and found that a pressure of 200 MPa or higher at a temperature of 450° C. or higher is required for filling the contact holes or viaholes in a poreless state although depends on the size of the hole and the thickness of the thin film.
Further, the present inventors have made a study on the reference that the temperature and the pressure as the conditions for the high temperature/high pressure processing greatly differ between the plated-Cu film and PVD-Cu film, and found that hydrogen intruding inevitably in the course of electrolytic plating probably promotes the diffusing phenomenon of Cu element at low temperature in case of electrolytically plated-Cu.
Taking notice of the difference of the copper wiring film formed by the electrolytic plating method and the copper wiring film formed by the PVD method, the present inventors have made experiment and study with a purpose of ensuring the quality and improving the reliability and the yield, namely, for overcoming the foregoing subject on the method of processing the copper wiring film formed by combination of the PVD method, the electrolytic plating method and the heat treatment under high pressure gas atmosphere and, as a result, have accomplished the present invention.
SUMMARY OF THE INVENTION
The present invention provides a method of forming a wiring film by covering the surface of an insulation film of a substrate having the insulation film formed with holes/trenches with a metal material of copper or copper alloy thereby enforcing and filling the metal
Fujikawa Takao
Masui Takuya
Narukawa Yutaka
Suzuki Kohei
Fourson George
Garcia Joannie Adelle
Kabushiki Kaisha Kobe Seiko
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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