Method of forming a trench isolation structure in a semiconducto

Details Method of forming a trench isolation structure in a semiconducto Method of forming a trench isolation structure in a semiconducto

1998-11-11

2000-12-19

Bowers, Charles

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438761, H01L 2176, H01L 2131

Patent

active

061627003

ABSTRACT:
A method of forming a trench isolation structure includes a low pressure chemical vapor deposition (LPCVD) that forms a silicon rich nitride layer as a mask for etching a semiconductor substrate. The LPCVD uses a mixed gas containing at least two different silicon compounds in a silicon source gas. The method can prevent deterioration of gate oxide layer reliability, and enhance an in-wafer and batch uniformity of the silicon rich nitride layer.

REFERENCES:
patent: 5580815 (1996-12-01), Hsu et al.
patent: 5877095 (1999-03-01), Tamura et al.
patent: 5968611 (1999-10-01), Kaloyeros et al.

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