Method of forming a super self-aligned hetero-junction...

Details Method of forming a super self-aligned hetero-junction... Method of forming a super self-aligned hetero-junction...

2005-03-01

2005-03-01

Pham, Long (Department: 2814)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

Having heterojunction

C257S565000

Reexamination Certificate

active

06861324

ABSTRACT:
The present invention provides a method of forming a super self-aligned bipolar transistor with enhanced electrical characteristics. The power gain and frequency response of the transistor are improved by horizontally etching an area for the base region that is wider than the active emitter and collector regions. By removing polysilicon layers within the device, the base region resistance goes down and unwanted capacitive effects are reduced.

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Ben G. Streetman and Sanjay Banejee, Solid State Electronic Devices 2000, Prentice Hall, Inc., 5thEdition, pp. 2, 149, 155.*
D.L. Harame, et al., “Si/SiGe Epitaxial-Base Transistors—Part II: Process Integration and Analog Applications”, IEEE, (pub. vol. 42, No. 3, Mar. 1995), pp. 469-482.

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