Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-08-29
1999-07-06
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438622, 438623, 438624, 438627, 438628, 438634, 438638, H01L 214763
Patent
active
059207906
ABSTRACT:
A method for forming semiconductor device (1) that includes providing a substrate (10) having a metal interconnect (12), depositing a via interlevel dielectric (ILD) layer (20) over the substrate (10) and the metal interconnect (12), etching the via ILD layer (20) to form a via (30) over the metal interconnect (12), depositing a trench ILD layer (32) over the via ILD layer (12) and the via (30), etching the trench ILD layer (32) to form a trench (40), the trench (40) being contiguous with the via (12), and depositing a metal (44) so as to fill the via (30) and the trench (40), and provide electrical connection with the metal interconnect (12).
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patent: 4789648 (1988-12-01), Chow et al.
patent: 4944836 (1990-07-01), Beyer et al.
B. Luther et al., "Planar Copper-Polyimide Back End of the Line Interconnections for ULSI Devices", Jun. 8-9, 1993 VMIC Conference, Catalog No. 93ISMIC-102, pp. 15-21.
Stankus John J.
Wetzel Jeffrey T.
Motorola Inc.
Niebling John F.
Zarneke David A.
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