Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-09-07
2002-12-03
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S613000, C438S615000, C438S654000
Reexamination Certificate
active
06489229
ABSTRACT:
FIELD OF THE INVENTION
This invention relates in general to semiconductor devices and their method of formation, and more particularly to semiconductor devices having solder bumps and methods for forming the solder bumps.
Background of the Invention Controlled Collapse Chip Connection (C4) interconnect technology is one form of flip-chip bump technology which is an alternative to wire bonding. The C4 interconnect process involves forming solder bumps and under-bump metallurgy (UBM) structures on a semiconductor chip's bond pads. The solder bumps are used in place of wires to electrically connect the chip's circuitry to external sources, for example to substrates used for chip packaging. The UBM provides important functions with respect to the C4 structure, among them include providing adhesion, electric continuity, and barrier protection between the C4 solder bump and semiconductor chip.
Conventional high-lead C4 solder bumps (solder bumps containing 97% lead and 3% tin) use a UBM integration that consists of sequentially forming a chromium, chromium-copper, copper, and gold layers over the bond pad and then forming the C4 Lead-Tin solder bump on the gold layer. Subsequent heat processes are then used to reflow and form the C4 bump structure, wherein the gold layer provides oxidation protection of the underlying copper layer; the copper layer functions as the primary wetting surface for the C4 bump; the chromium-copper layer promotes intermetal adhesion by functioning as a nucleating layer onto which copper and tin intermetallics (Cu
3
Sn) form during subsequent reflow processes; and the chromium layer functions as barrier and an adhesion promoter to the underlying semiconductor chip surface.
One problem with conventional high-lead solder bumps is manufacturing cost. High vacuum evaporators are expensive to purchase, operate, and maintain. Raw materials used in the process are expensive. While process parameters can be modified to improve throughput (e.g. operating at higher pressures) to reduce overall costs, there is always a need to reduce costs further. One of the highest variable cost of the conventional C4 process is the gold evaporation process, particularly costs associated with the gold source itself. Therefore, it would be desirable if a bump process were developed which could eliminate the need for utilizing gold.
REFERENCES:
patent: 3458925 (1969-08-01), Napier et al.
patent: 4434434 (1984-02-01), Bhattacharya et al.
patent: 4516525 (1985-05-01), Bourgeois et al.
patent: 4622205 (1986-11-01), Fouts et al.
patent: 4646958 (1987-03-01), Howard, Jr.
patent: 5137845 (1992-08-01), Lochon et al.
patent: 5470787 (1995-11-01), Greer
patent: 6107180 (2000-08-01), Munroe et al.
patent: 6184061 (2001-02-01), Wu et al.
patent: 6417089 (2002-07-01), Kim et al.
Greer, “An Extended Eutectic Solder Bump for FCOB,” IEEE, 1996 Electronic Components and Technology Conference, pp. 546-551.
Pan et al., “Microstructures of Phased-in Cr-Cu/Cu/Au Bump-limiting Metallization and its Soldering Behavior With High Pb Content and Eutectic PbSn Solders,” American Institute of Physics, Appl. Phys. Lett. 71 (20), Nov. 17, 1997, pp. 2946-2948.
Liu et al., “High Sn Solder Reaction with Cu Metallization,” Scripta Materialia, vol. 35, No 1, pp. 65-69 (1996).
Knauss Martie D.
Larsen Larry J.
Sheridan Devin Robert
Dang Trung
Goddard Patricia S.
King Robert L.
Motorola Inc.
LandOfFree
Method of forming a semiconductor device having conductive... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming a semiconductor device having conductive..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a semiconductor device having conductive... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2950304