Method of forming a semiconductor device

Details Method of forming a semiconductor device Method of forming a semiconductor device

2000-05-12

2002-04-23

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S680000, C438S643000, C438S644000, C438S645000, C438S648000, C438S687000, C257S751000, C257S752000, C257S753000, C257S762000, C257S763000, C257S767000

Reexamination Certificate

active

06376371

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the processing of semiconductor devices, and more specifically to providing a diffusion barrier onto a semiconductor device.
BACKGROUND OF THE INVENTION
Modern semiconductor devices are requiring speeds in excess of 200 megahertz. In order to form future generations of semiconductor devices, copper (Cu) will essentially be required for interconnects. One problem with the use of copper is that copper cannot directly contact silicon dioxide because copper diffuses too easily through the silicon dioxide layer. Therefore, in the prior art the copper is typically surrounded by a diffusion barrier on all sides.
Diffusion barriers for copper include a number of materials, such as silicon nitride and various refractory metal nitrides (TiN, TaN, WN, MoN) and refractory silicon nitrides (TiSiN, TaSiN, WSiN), or refractory metal-semiconductor-nitride layers. Of all of these barriers, the two showing promise for barriers include tantalum nitride (TaN) and tantalum silicon nitride (TaSiN). These materials are usually deposited by sputtering. However, sputtering generally has poor sidewall step coverage, where step coverage is defined to be the percentage of a layer being deposited on a specific surface divided by the thickness of a layer being deposited on the uppermost surface of a semiconductor device. In the case of sputtered tantalum nitride (TaN) and tantalum silicon nitride (TaSiN), and the step coverage for a 0.35 &mgr;m via can be in the range of 5% to 20% for an aspect ratio of 3:1. Such low step coverage increases the risk that the barrier material will not be thick enough to be an effective diffusion barrier along the sides and bottom of a deep opening. In an attempt to get enough of the material along the walls of openings, a much thicker layer at the uppermost surface is deposited, however, this is undesirable because it increases the resistance of the interconnect.
Chemical vapor deposition (CVD) has been used to form tantalum nitride. The precursors for TaN includes tantalum halides, such as Tantalum Pentachloride (TaCl
5
). The problem with tantalum halides is that the halides react with the copper causing interconnect corrosion. Another precursor includes penta[dimethylamido]tantalum (Ta(NMe
2
)
5
). When this precursor is used to deposit tantalum nitride (TaN), the compound that is actually forms is an insulating layer of Ta
3
N
5
. An insulator cannot be used in contact openings or via openings because the insulator prevents electrical contact between the upper interconnect layer and the lower interconnect layer.
Still another known precursor includes terbutylimido-tris-diethyl amino tantalum [(TBTDET), Ta═NBu(NEt
2
)
3
]. This compound can be used to form TaN. However, there are problems associated with this precursor. Specifically, deposition temperatures higher than 600° C. is needed to deposit reasonably low resistivity films. Such high temperatures for back-end metallization are incompatible for low-k dielectrics and also induces high stresses due to thermal mismatch between the back-end materials. Another problem with the TBTDET precursor is that too much carbon (C) is incorporated within the layer. This compound generally has approximately 25 atomic percent carbon. The relatively high carbon content makes the layer highly resistive, and results in films that are less dense, lowering the diffusion barrier effectiveness for a comparable thickness of other materials. The resistivity of TaN when deposited using TBTDET at temperatures lower than 600° C. is approximately 12,000 &mgr;ohm-cm. Films with such a high resistivity (desired is less than approximately 1000 &mgr;ohm-cm) cannot be used for making effective interconnect structures.
CVD of titanium silicon nitride (TiSiN) has been demonstrated using titanium tetrachloride (TiCl
4
). This compound is again undesirable because in forming the TiSiN, chlorine is once again present which causes corrosion of copper and other materials used for interconnect.
A need, therefore, exists to deposit a TaN or TaSiN using organo-metallic precursors that can be formed relatively conformally with a reasonable resistivity and good barrier properties at lower wafer temperatures.


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