Method of forming a self-aligned contact in semiconductor fabric

Details Method of forming a self-aligned contact in semiconductor fabric Method of forming a self-aligned contact in semiconductor fabric

1998-03-23

1999-11-23

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438595, 438640, 438666, 438684, 438755, H01L 213205, H01L 214763

Patent

active

059899875

ABSTRACT:
A method is provided for use in semiconductor fabrications to form a self-aligned contact (SAC) in a semiconductor device, which can help increase the contact area between the metallization layer and the substrate and also prevent the occurrence of a short-circuit between the metallization layer and a conductive layer, such as a tungsten silicide layer, in the gate structures. In particular, the method utilizes an etchant that can etch into the tungsten silicide much more effectively than into the overlying silicon nitride layer and the underlying polysilicon layer. The constricted shape can better prevent the silicide layer from coming into contact, and thus forming a short-circuit, with the subsequently formed metallization layer. Moreover, since the silicide layer is reduced in size due the constriction, the underlying polysilicon layer can be correspondingly made smaller, allowing the contact area between the metallization layer and the substrate to be increased. The increased contact area allows an increase in the RC value of the self-aligned contact.

REFERENCES:
patent: 5510294 (1996-04-01), Dixit et al.
patent: 5861673 (1999-01-01), Yoo et al.

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