Method of forming a polycide layer in a semiconductor device

Details Method of forming a polycide layer in a semiconductor device Method of forming a polycide layer in a semiconductor device

1997-06-16

1999-11-02

Beck, Shrive

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438657, 438684, 438761, 427 58, 427255, H01L 2500, C23C 1624

Patent

active

059769610

ABSTRACT:
The method of forming a polycide layer in a semiconductor device is provided. The method of forming a polycide layer comprises the steps of depositing a doped polysilicon layer on a silicon substrate on which an insulating layer is formed and depositing a tungsten silicide on the doped polysilicon layer, the doped polysilicon layer comprises a lower, intermediate and upper doped polysilicon layers sequentially formed, also the intermediate polysilicon layer has a lower concentration of impurity ion than the upper and lower polysilicon layers. The impurity ions contained within the upper and lower polysilicon layers are diffused into the intermediate layer having the lowest concentration of impurity during a subsequent annealing process, therefore the impurity ions contained within the upper and lower polysilicon layers are not diffused to the junction and the tungsten silicide.

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