Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2011-05-31
2011-05-31
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257SE21561
Reexamination Certificate
active
07951657
ABSTRACT:
Disclosed are embodiments of a method of forming, on an SOI wafer, a planar FET with embedded and faceted source/drain stressors. The method incorporates a directional ion implant process to create amorphous regions at the bottom surfaces of source/drain recesses in a single crystalline semiconductor layer of an SOI wafer. Then, an etch process selective to different crystalline planes over others and further selective to single crystalline semiconductor material over amorphous semiconductor material can be performed in order to selectively adjust the shape (i.e., the profile) of the recess sidewalls without increasing the depth of the recesses. Subsequently, an anneal process can be performed to re-crystallize the amorphous regions and an epitaxial deposition process can be used to fill the recesses with source/drain stressor material. Also disclosed are embodiments of a planar FET structure and a design structure for the planar FET.
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Cheng Kangguo
Faltermeier Johnathan E.
Furukawa Toshiharu
Hua Xuefeng
Booth Richard A.
Gibb I.P. Law Firm LLC
International Business Machines - Corporation
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