Method of forming a MOS field effect transistor with improved ga

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

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438230, 438595, 438703, 438683, H01L 218238, H01L 213205, H01L 214763, H01L 2144, H01L 21311

Patent

active

06017823&

ABSTRACT:
The present invention provides a method of forming gate side wall insulation films on side walls of a gate electrode on a gate insulation film over a silicon substrate surface. The method comprises The following steps. Gate side wall insulation films are selectively formed on side walls of a gate electrode. A silicon film is selectively grown on at least any one of a top of the gate electrode and on the silicon substrate surface. Surface regions of the gate side wall insulation films are etched.

REFERENCES:
patent: 5661052 (1997-08-01), Inoue
patent: 5759899 (1998-06-01), Saito

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