Method of forming a molded array package device having an...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C257S685000, C257SE21599, C257SE23116, C257SE23141, C438S111000, C438S123000, C438S124000, C438S127000

Reexamination Certificate

active

07901990

ABSTRACT:
In one embodiment, a method for forming a molded flat pack style package includes attaching electronic chips to an array lead frame, which includes a plurality of elongated flag portions with tab portions and a plurality of leads. The method further includes connecting the electronic chips to specific leads, and then molding the array lead frame while leaving portions of the leads exposed to form a molded array structure. The molded array structure is then separated to provide molded flat pack style packages having exposed leads for insertion mount and exposed tab portions. In an alternative embodiment, the separation step produces a no-lead configuration with exposed tab portions.

REFERENCES:
patent: 4043027 (1977-08-01), Birchler et al.
patent: 4900501 (1990-02-01), Saeki et al.
patent: 5349233 (1994-09-01), Sasaki
patent: 5659950 (1997-08-01), Adams et al.
patent: 6157050 (2000-12-01), Fukuoka
patent: 6689642 (2004-02-01), Fukuda

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