Method of forming a metal-insulator-metal capacitor...

Details Method of forming a metal-insulator-metal capacitor... Method of forming a metal-insulator-metal capacitor...

2005-04-05

2005-04-05

Chen, Jack (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S532000, C257S310000, C438S250000, C438S393000

Reexamination Certificate

active

06876027

ABSTRACT:
A method of forming a metal-oxide-metal (MIM), capacitor structure wherein the fabrication procedures used for the MIM capacitor structure are integrated into a process sequence used to form damascene type copper interconnect structures for CMOS type devices, has been developed. The process sequence features a copper damascene connector located overlying exposed portions of a semiconductor substrate, and underlying the MIM capacitor structure. The MIM capacitor structure, comprised a capacitor dielectric layer sandwiched between conductive capacitor plates, is protected during several selective reactive ion etching patterning procedures by an overlying anti-reflective coating (ARC), insulator shape, and by insulator spacers located on the sides of the ARC shape and on the sides of a capacitor dielectric shape. The presence of the insulator shape protects the MIM capacitor structure during a subsequent process used to define another copper damascene connector structure, overlying and contacting the MIM capacitor structure.

REFERENCES:
patent: 5946567 (1999-08-01), Weng et al.
patent: 6001702 (1999-12-01), Cook et al.
patent: 6313003 (2001-11-01), Chen
patent: 6387775 (2002-05-01), Jang et al.
patent: 6583491 (2003-06-01), Huang et al.
patent: 6734079 (2004-05-01), Huang et al.

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