Method of forming a fine pattern of a semiconductor device...

Details Method of forming a fine pattern of a semiconductor device... Method of forming a fine pattern of a semiconductor device...

2011-07-12

2011-07-12

Kebede, Brook (Department: 2894)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S700000, C257SE21548, C257SE21549, C257SE21553

Reexamination Certificate

active

07977204

ABSTRACT:
A method of forming a fine pattern of a semiconductor device uses a double patterning technique. A first mask pattern is formed on a first hard mask layer disposed on a substrate. A conformal buffer layer is formed over the first mask pattern. A second mask pattern is formed such that segments of the buffer layer are interposed between the first and second mask patterns, and each topographical feature of the second mask pattern is disposed between two adjacent ones of each respective pair of topographical features of the first mask pattern. A first hard mask pattern is formed by etching the first hard mask layer using the first mask pattern, the second mask pattern, and/or the buffer layer as an etch mask. A trench is formed by etching the substrate using the first hard mask pattern as an etch mask. An isolation layer, of a material that is different from that of first hard mask pattern, is formed in the trench.

REFERENCES:
patent: 6194285 (2001-02-01), Lin et al.
patent: 2008/0090419 (2008-04-01), Koh et al.
patent: 100714305 (2007-04-01), None
patent: 100825801 (2008-04-01), None
patent: 1020080042263 (2008-05-01), None

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