Method of forming a dual damascene structure

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S638000, C438S672000, C438S700000, C257S758000

Reexamination Certificate

active

10789083

ABSTRACT:
An improved method of forming an integrated circuit that includes a dual damascene interconnect is described. A contact via hole is formed in a dielectric layer disposed above a semiconductor substrate. A protective layer is disposed on top of the dielectric layer and in the contact via hole, and subsequently forming as a recessed plug in the via, followed by etching to form a trench to complete formation of a dual damascene opening.

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Ding et al. “Optimization of Bottom Antireflective Coating Materials for Dual Damascene Process”,SPIE Proceedings, 3999, (2000), pp. 910-918.
Pollentier et al., “Dual Damascene Back-End Patterning Using 248 nm and 193 nm Lithography”,Interface 2000, pp. 265-283.
Gadson et al., “Top Surface Imaging Improves Copper Process Resolution”,Solid State Technology, pp. 1-5, 77(2001).

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