Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-12-19
2002-08-20
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S672000, C438S687000, C438S688000, C438S693000
Reexamination Certificate
active
06436811
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a process for forming an electric interconnect made of a copper-containing metal by chemical mechanical polishing.
2. Description of the Prior Art
With regard to forming a semiconductor integrated circuit such as ULSI which has been significantly refined and compacted, copper has been expected to be a useful material for electric connection because of its good electromigration resistance and lower electrical resistance.
To date a copper interconnect is; formed as follows due to problems such as difficulty in patterning by dry etching. Specifically, a concave such as a groove and a connection hole is formed in an insulating film, a barrier metal film is formed on the surface, a copper film is deposited over the whole surface by plating such that the concave is filled with the material, and then the surface is polished to be flat by chemical mechanical polishing (hereinafter, referred to as “CMP”) until the surface of the insulating film except the concave area is completely exposed, to form electric connections such as a damascene interconnect in which the concave is filled with copper, a via plug and a contact plug.
There will be described a process for forming a damascene copper interconnect with reference to FIG.
1
.
As shown in FIG.
1
(
a
), on a first interlayer insulating film
1
in which a lower-layer interconnect
2
is formed are sequentially formed a silicon nitride film
3
and a second interlayer insulating film
4
. Then in the second interlayer insulating film
4
is formed a concave having an interconnect pattern, in a part of which is formed a connecting hole reaching the lower-layer interconnect
2
.
Then, as shown in FIG.
1
(
b
), a barrier metal film
5
is formed by sputtering. On the whole surface of the film is formed a copper film
6
by plating such that the concave is filled with the material. The thickness of the plating is larger than the sum of the depth of the groove, the depth of the connecting hole and a manufacturing dispersion in the plating step.
As shown in FIG.
1
(
c
), the copper film
6
is polished by CMP using a polishing pad in the presence of a polishing slurry to make the substrate surface flat. polishing is continued until the metal over the second insulating film
4
is completely removed, as shown in FIG.
1
(
d
).
A slurry for CMP for polishing copper generally comprises an oxidizing agent and polishing grains. A basic mechanism is that the copper surface is etched by chemical action of the oxidizing agent while the oxidized surface layer is mechanically removed by polishing grains.
Primary particles of &agr;-alumina with an average particle size (diameter) of several hundred nm have been conventionally used as polishing grains in a polishing slurry having a large polishing rate for a copper film, because primary particles having a desired average particle size can be easily manufactured and have a higher polishing rate.
As a semiconductor device has been more refined and more integrated, leading to a more complicated device structure, and as there has been an increased number of layers in a multilayer aimed at reducing the interconnect length for dealing with an increase in an interconnected resistance associated with refinement of an interconnect or a multilayer in a logic system, a substrate surface had become more bumpy and its level difference had become larger. An upper interconnect in a multilayer interconnect is used for a source interconnect, a signal interconnect or a clock interconnect, and therefore, an interconnect groove must be deeper for improving some properties by reducing resistances in these interconnects. As a result, an interlayer insulating film formed on such a substrate surface had become thicker and thus it has been necessary to form a thick copper film by which a deep concave can be filled, for forming a damascene conductive part such as a damascene copper interconnect or via plug in a thick interlayer insulating film. For reducing a resistance of a refined interconnect or reducing a resistance of a signal or clock interconnect to improve a conduction speed, it is necessary to form an interconnect which is thick in a depth direction, so that copper film is formed for providing a deep concave. When a source interconnect is formed with a damascene copper interconnect, a thick copper film is formed for reducing a resistance of the source interconnect for minimizing a potential change. While conventionally a copper film with a thickness of about several hundred nm has been adequately useful, several thousand nm may be sometimes required for a copper film.
When forming a damascene conductive part by forming such a thick copper film, the amount of copper to be removed by polishing during one CMP step increases, so that a large amount of polishing scrape such as a copper or copper oxide adheres to and is accumulated on the surface of a polishing pad. As a result, a polishing rate may become too low continue polishing or a polished surface cannot be uniform. It is now needed to make a wafer larger for improving a productivity. However, as a wafer becomes larger, an area of a copper film increases, and therefore the amount of copper to be removed by polishing has been increasing. Polishing scrapes, such as copper or copper oxide generated during polishing a copper metal film is herein designated a “polishing product”.
A surface plate in a CMP apparatus cannot be so large in the light of factors such as ensuring in-plane uniformity of the surface plate, even diffusivity of a dropped polishing slurry, limitation in an area where the CMP apparatus is placed, workability in replacing a polishing pad and ensuring cleanliness in a clean room.
Increase of the amount of polished copper reduces a throughput at the same polishing rate as that for a thinner film. It is, therefore, necessary to increase a polishing rate for copper. Increase of a polishing rate for copper, however, leads to a large amount of polishing product in a short time, so that adhesion of copper to the surface of the polishing pad becomes more significant.
When a large amount of polishing product adheres to the surface of the polishing pad as described above, the polishing pad must be washed or replaced after every polishing, and furthermore, polishing must be repeated after washing or replacing the polishing pad, resulting in significant reduction in a throughput.
When a contact pressure (polishing pressure) of the polishing pad relative to the polished surface is increased for increasing a polishing rate and improving uniformity in the polished surface, adhesion of the polishing product to the surface of the polishing pad may cause inadequate in-plane uniformity in the polished surface as well as may enhance adhesion of the polishing product to the surface of the polishing pad.
JP-A 10-116804 has demonstrated the problem that copper ions generated during CMP are accumulated on a polishing pad and again adhere to a wafer surface to deteriorate uniformity of the wafer surface and cause electric short-circuit, and has described that the problem can be solved by using a polishing composition comprising a re-adhesion inhibitor such as benzotriazole in CMP. The publication has mentioned the problem due to re-adhesion of copper ions on the wafer surface, but there are no descriptions for the above due to adhesion of a polishing product to a pad surface. Benzotriazole used as a re-adhesion inhibitor may act as an antioxidant (J. B. Cotton, Proc. 2nd Intern. Congr. Metallic Corrosion, (1963) p.590; D. Chadwick et al., Corrosion Sci., 18, (1978) p.39; T. Notodani, Bousei Kanri, 26(3) (1982), p.74; H. Okabe ed., “Sekiyu Seihin Tenkazai no Kaihatsu to Saishin Gijutsu” (1998), CMC, p.77-82), there is a limitation to the amount of the agent for reducing a polishing rate for copper. Furthermore, benzotriazole is originally added for preventing dishing (JP-As 8-83780 and 11-238709). When prevention of dishing is given priority, the amount of the agent is limited.
JP-A 10-46140 has d
Tsuchiya Yasuaki
Wake Tomoko
Gurley Lynne A.
Niebling John F.
Scully Scott Murphy & Presser
LandOfFree
Method of forming a copper-containing metal interconnect... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming a copper-containing metal interconnect..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a copper-containing metal interconnect... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2967517