Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2005-10-18
2005-10-18
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S735000, C438S749000
Reexamination Certificate
active
06955988
ABSTRACT:
A semiconductor substrate (1) comprising an SOI (2) formed therein. The semiconductor substrate (1) comprises first and second wafers (4,6) which are directly bonded together along a bond interface (9). Prior to bonding the wafers (4,6), a portion (15) of the second wafer (6) is ion implanted to form a p+ region for facilitating selective etching thereof to form a buried cavity (16), in which a buried insulating layer is subsequently formed under a portion (10) of the first wafer (4) for forming the SOI (2). After bonding of the first and second wafers (4,6) a communicating opening (20) is etched through the first wafer (4) to the bond interface (9), and the selectively etchable portion (15) is etched through the communicating opening (20) to form the buried cavity (16). The buried cavity (16) is then filled with deposited oxide to form the buried insulating layer (11). An isolation trench (12) is formed through the first wafer (4) to the buried insulating layer (11) around the portion (10) for isolating the SOI (2) from the remainder of the first wafer (4).
REFERENCES:
patent: 6004406 (1999-12-01), Kobayashi et al.
patent: 6417075 (2002-07-01), Haberger et al.
McCann Paul Damien
Nevin William Andrew
Analog Devices Inc.
Dang Phuc T.
Gauthier & Connors LLP
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