Method of forming a capacitor including forming a first and seco

Details Method of forming a capacitor including forming a first and seco Method of forming a capacitor including forming a first and seco

1999-03-03

2000-06-06

Bowers, Charles

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

Self-aligned

438253, 438669, H01L 21331

Patent

active

060717874

ABSTRACT:
A capacitor fabrication method for a semiconductor memory device, and in particular for a lower-portion electrode forming of a memory cell capacitor, wherein the entire effective area of the capacitor is extended by using a second conductive layer pattern as a mask and patterning an underlying first conductive layer which will be the lower-portion electrode. A mixed conductive material residue is generated in forming the lower-portion electrode and forms conductive residue sidewalls at the both sides of the lower-portion electrode.

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patent: 5479317 (1995-12-01), Ramesh
patent: 5519235 (1996-05-01), Ramesh
patent: 5790366 (1998-08-01), Desu et al.
patent: 5825609 (1998-10-01), Andricacos et al.

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