Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Self-aligned
Reexamination Certificate
2000-08-16
2001-09-11
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Self-aligned
C438S341000, C438S369000, C438S370000
Reexamination Certificate
active
06287929
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method of forming a semiconductor device with a self-aligned bipolar transistor.
The conventional method of forming a semiconductor device with a self-aligned bipolar transistor is disclosed in Japanese laid-open patent publication No. 7-307347. A collector layer is surrounded by field oxide films. A first insulation film having a first etching selectivity is deposited on the collector layer. A second conductivity type polysilicon base layer is then deposited on the first insulation film. A second insulation film having a second etching selectivity different from the first etching selectivity of the first insulation film is deposited on the second conductivity type polysilicon base layer. The second insulation film and the second conductivity type polysilicon base layer are selectively etched to form an emitter opening which is positioned at almost center position. A third insulation film having a third etching selectivity different from the first etching selectivity of the first insulation film is entirely deposited. The third insulation film is then subjected to an etch-back, thereby forming first side walls on side walls of the emitter opening. The first insulation film is selectively etched so that a part of a surface of the collector layer is made shown and further a side-etch is made to form a gap having a predetermined depth which is positioned under the second conductivity type polysilicon base layer. A non-selective growth of polysilicon only or amorphous silicon only is carried out to fill the gap. The polysilicon or amorphous silicon is then subjected to an isotropic etching so that the polysilicon or amorphous silicon remains only in the gap. A second conductivity type epitaxial base layer is selectively grown on the shown surface of the collector layer.
In accordance with the above conventional method, after SIC phosphorus implantation has been made, then the silicon surface is etched to change a distance between the base surface and an n+-type substrate. If the amount of etching is small, then the base width is changed from the intended or designed base width. If the amount of etching is small, then the base width is also changed from the intended or designed base width. High frequency performances or characteristics of the bipolar transistor depend upon the base width, for which reason the change in base width of the bipolar transistor changes the high frequency performances or characteristics of the bipolar transistor.
In the above circumstances, it had been required to develop a novel method of forming a semiconductor device having a bipolar transistor free from variations of high frequency performances or characteristics by suppressing variations of a base width.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a novel method of forming a semiconductor device having a bipolar transistor free from the above problems.
It is a further object of the present invention to provide a novel method of forming a semiconductor device having a bipolar transistor free from variations of high frequency performances or characteristics.
It is a still further object of the present invention to provide a novel method of forming a semiconductor device having a bipolar transistor by suppressing variations of a base width.
In accordance with the above first embodiment of the present invention, after a base polysilicon film has been grown, a lump anneal is carried out because of an extremely small variation to the silicon dioxide film. Subsequently, a buffered fluorine acid is used which has a large selective etching ratio of the silicon oxide film to the polysilicon film to side-etch the silicon oxide film in the horizontal direction by a predetermined width before the base impurity BF
2
+ is implanted and then the emitter polysilicon film is formed. For those reasons, a variation in distance between the n+-substrate and a collector is small. The base width “WB” of the base region is not varied, whereby variations in high frequency performance of the bipolar transistor are suppressed.
The above and other objects, features and advantages of the present invention will be apparent from the following descriptions.
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King et al.; Very Low Cost Graded SiGe Base Bipolar Transistors for a High Performance Modular BiCMOS Process, IEDM 99, 1999, p. 22.4.1-22.4.4.
Hayes Soloway Hennessey Grossman & Hage PC
Lattin Christopher
NEC Corporation
Niebling John F.
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