Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
1999-10-20
2001-06-12
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S407000, C438S702000, C438S149000
Reexamination Certificate
active
06245636
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates generally to semiconductor devices and more specifically to methods for forming a semiconductor substrate having electrically isolated surface regions.
2. Description of the Prior Art
Conventional bulk semiconductor devices are formed in semiconductor material by implanting wells of P-type or N-type material in a wafer of the other type of material. Gates and source-drain areas may then be manufactured on the wafer using well-known processes. The resulting devices are known as metal oxide semiconductor (MOS) field effect transistors (MOSFETs). Each device must be electrically isolated from others on the same circuit in order to avoid unwanted connections in the circuits. A relatively large amount of surface area is needed for the electrical isolation of the various MOSFETs. This large amount of surface area devoted to isolation is undesirable in view of the trend toward reduced size of integrated circuits and greater density of elements on integrated circuits. Prior methods of electrically isolating semiconductor integrated transistors from one another have included laterally isolating active regions using insulating material. Two methods of forming the insulating material are (1) selective oxidation of wafer semiconductor material surrounding the active regions by processes such as low temperature oxidation (LTO) or local oxidation of silicon (LOCOS) and (2) deposit of insulating material in trenches formed around the active regions. Such techniques are of limited applicability in that they form insulating material only in relatively shallow regions around the active regions.
Another method that has been utilized is silicon-on-insulator (SOI) isolation techniques. In SOI techniques active areas are formed on an insulating substrate or layer, thereby providing more complete insulation between adjacent active areas of an integrated circuit. However, SOI techniques suffer from problems such as dynamic floating body effects. Floating body effects occur when the body of a device is not connected to a fixed potential and therefore the device takes on a charge based on the history of the device. This can be particularly detrimental in devices such as dynamic random access memory (DRAM) devices where it is critical that a pass transistor stays in an “off” condition to prevent charge leakage from a storage capacitor.
Accordingly, from the above it is seen that there is a need for devices that provide good electrical isolation such as SOI devices without the undesirable drawback of floating body effects.
SUMMARY OF THE INVENTION
A method for processing a semiconductor wafer transforms the wafer into one which has a plurality of surface semiconductor platforms for formation of integrated circuit elements thereupon. The platforms are connected to a subsurface bulk layer of semiconductor material via integrally-formed bridges of semiconductor material. The platforms are otherwise surrounded with an electrically-insulating material, thereby providing good insulation between adjacent of the platforms. The method includes the steps of placing a mask on a wafer surface of the wafer, forming a subsurface altered material beneath portions of the wafer surface not covered by the mask, creating exposure openings through the wafer surface to expose a portion of the subsurface altered material, selectively removing the subsurface altered material by selective etching, and filling the subsurface regions and the exposure openings with an electrically-insulating material. In an exemplary embodiment the mask includes a plurality of gate conductors, and the wafer surface is bombarded with boron ions to create a subsurface boron-doped material, the boron-doped material being removed using an appropriate selective etchant.
According to one aspect of the invention, a method of processing a semiconductor wafer includes forming an altered material in a subsurface region under part of a wafer surface of the wafer, and selectively removing the altered material.
According to another aspect of the invention, a method of processing a semiconductor wafer includes using gate conductors formed on a wafer surface of the wafer as a mask to protect portions of the wafer surface from ion bombardment.
According to yet another aspect of the invention, a method of processing a semiconductor wafer includes lateral etching of a subsurface region accessible through one or more exposure openings.
According to a further aspect of the invention, a method of processing a semiconductor wafer includes the steps of forming an altered material in subsurface region within the wafer; exposing a portion of the altered material by removing a portion of a surface layer between the subsurface region and a wafer surface to create exposure openings; and selectively removing through the exposure opening the altered material from at least a portion of the subsurface region which underlies a remaining portion of the surface layer.
According to a still further aspect of the invention, a method of forming a semiconductor device includes the steps of depositing an electrically active element on a surface of a semiconductor wafer, and using the electrically active element as a mask to block ion implantation through the portion of the surface covered by the electrically active element.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.
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Advanced Micro Devices , Inc.
Chaudhuri Olik
Rao Shrinivas H.
Renner , Otto, Boisselle & Sklar, LLP
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