Method of flash memory management

Details Method of flash memory management Method of flash memory management

2006-04-15

2008-08-05

Bragdon, Reginald G. (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S206000

Reexamination Certificate

active

07409490

ABSTRACT:
A wear-leveling method for managing flash memory is provided, including an access process to consult a translation table when accessing a data block in the data region, and a reconstruction process to reconstruct the translation table when powering on the flash memory. The translation table is defined to include a plurality of entries, and each entry includes a physical address field and an enduring counter field. The logical address of a data block is used as input to map to the entry in the translation table. The access process, further including a read process and an erase/program process, maps the logical address to the physical address, and uses the enduring counter to determine whether an update is required to avoid the disturbance. The reconstruct process uses the information stored in the spare data region to reconstruct the translation table for the access process to consult during flash memory accesses.

REFERENCES:
patent: 6285592 (2001-09-01), Kubota
patent: 2005/0055495 (2005-03-01), Vihmalo et al.
patent: 2005/0073884 (2005-04-01), Gonzalez et al.

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