Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
2001-11-30
2004-10-05
McPherson, John A. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S394000, C430S396000, C430S397000, C430S005000
Reexamination Certificate
active
06800421
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a technique for use in fabricating a semiconductor integrated circuit device; and, more particularly, the invention relates to a photolithographic (hereafter simply called lithography) technique for transferring a predetermined pattern onto a semiconductor wafer (hereafter simply called a wafer) by exposure processing using a photomask (hereafter simply called a mask) in the fabrication of semiconductor integrated circuit devices.
In the fabrication of semiconductor integrated circuit devices, a lithographic technique is used as a method of transferring a micropattern onto a wafer. In such a lithographic technique, a projection aligner is mainly used to form a device pattern by transferring a pattern of a mask mounted on the projection aligner to a wafer.
The mask used in the projection exposure method has a structure such that a light shielding pattern comprised of a metal film, such as chromium, is disposed over a transparent mask substrate so as to intercept exposing light. For example, the fabrication process is as follows.
First, a metal film made of chromium, which is to serve as a light shielding film, is disposed over a transparent mask substrate, and a resist film that is photosensitive to electron beams is coated thereon. Subsequently, electron beams are irradiated onto predetermined areas on the resist film by an electron beam lithography system, and the resist film is developed to form a resist pattern. Then, the resist pattern is used as an etching mask to etch the underlying metal film, and thereby a light shielding pattern comprised of the metal film is formed. After the remaining electron beam-sensitive resist film is removed, a mask is fabricated through the inspection process for the pattern on the mask.
However, the mask of this configuration has problems in that costs are increased because of a number of fabricating steps, or work dimensional accuracy is decreased because the light shielding pattern is processed by isotropic etching. As a technique which considers such problems, Japanese Patent Laid-Open No. 289307/1993, for example, discloses a technique in which a light shielding pattern is configured on a mask substrate with a resist film utilizing that a predetermined resist film allows the transmittance to be zero percent to an ArF excimer laser.
Additionally, Japanese Patent Laid-Open No. 100655/1991 discloses a technique in which an aperture is configured by two aperture blades disposed with a light transparent part or light shielding part for shaping laser beam light, the two aperture blades are overlaid for use and thereby defects on a mask are repaired. Furthermore, Japanese Patent Laid-Open No. 142309/1995, for example, discloses a technique in which a product pattern image having a partially chipped part that is generated near edges of a wafer is controlled by a reticle blind for double exposure.
However, the inventors found that there are the following problems in the mask technique which uses a resist film as a light shielding pattern.
More specifically, first, there is a problem in that it has not been sufficiently considered to fabricate a mask efficiently in a short time. For example, in custom products, such as an ASIC (Application Specific IC), the man-hours and the period of time required for product development have become longer with the demand for higher performances are, whereas the obsolescence of existing products occurs quickly and product-life cycles are short. Thus, it is desired to shorten the product development and manufacturing time. Accordingly, an important issue is how a mask for use in manufacturing such products can be fabricated efficiently for a short time.
Secondly, there is a problem that further cost reduction of a mask is not considered adequately. Recently, in semiconductor integrated circuit devices, mask costs have become increasing higher and higher for the following reason. More specifically, the reason is that the field of a mask fabrication apparatus has a small market scale and thus it is unprofitable; development expenses or running costs for a lithography system for forming a pattern on a mask or an inspection system for inspecting the pattern are becoming extravagant with the realization of micropatterning and large scale integration of a pattern formed on a mask; and thus prices for a mask have to be increased in order to collect the costs therefor. Additionally, with increased performances of semiconductor integrated circuit devices, the total number of masks required for manufacturing one semiconductor integrated circuit device tends to increase. Therefore, an important issue is how mask costs can be decreased.
SUMMARY OF THE INVENTION
An object of the invention is to provide a technique that is capable of shortening manufacturing time for semiconductor integrated circuit devices.
A further object of the invention is to provide a technique that is capable of reducing costs for a semiconductor integrated circuit device.
The aforesaid and other purposes and novel features of the invention will be apparent from the description in this specification and the accompanying drawings.
Among the aspects and features of the invention disclosed in this application, a brief summary of representative ones is as follows.
That is, the invention is characterized by the fact that a pattern in a plurality of chip areas of a photomask is transferred onto an internal area of a semiconductor wafer, and chip areas including defects, among the plurality of chip areas of the photomask, are shielded with a light shielding body.
Additionally, the invention is characterized by method which has the steps of: transferring a pattern onto a first semiconductor wafer using a photomask disposed with a light shielding pattern comprised of an organic film having a light shielding property to exposing light in a plurality of chip areas and then inspecting the pattern transferred onto the first semiconductor wafer; and performing exposure so as not to transfer defects onto a second semiconductor wafer even though the photomask having the defects is used, by utilizing a result of the inspection in transferring the pattern onto the second semiconductor wafer using the photomask.
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Hasegawa Norio
Tanaka Toshihiko
Antonelli Terry Stout & Kraus LLP
Chacko-Davis Daborah
McPherson John A.
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