Method of fabrication of a novel flash integrated circuit

Details Method of fabrication of a novel flash integrated circuit Method of fabrication of a novel flash integrated circuit

1999-07-12

2001-07-24

Lee, Eddie C. (Department: 2815)

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

Ion implantation of dopant into semiconductor region

C438S526000, C438S700000, C438S701000, C438S434000

Reexamination Certificate

active

06265292

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of integrated circuit manufacturing and more specifically to novel methods and structures for fabricating high density flash memories.
2. Discussion of Related Art
Memory integrated circuits, such as flash memories (e.g., EEPROMS) are continually being scaled down in size in order to attempt to integrate greater numbers of storage cells onto a signal chip. However, certain device structures and fabrication techniques, such as but not limited to LOCOS isolation, contact resistance, and planarization techniques are reaching their performance and manufacturing limits. Thus, what is desired are new methods and structure which will enable the continued increase in device density and performance so that higher density flash memory circuits can be fabricated.
SUMMARY OF THE INVENTION
A method of fabricating a flash memory integrated circuit is described. In an embodiment of the present invention a dielectric filled trench isolation region is formed in a silicon substrate. The dielectric filled trench isolation region isolates a first portion of the silicon substrate from a second portion of the silicon substrate. A portion of the dielectric in the trench is then removed to reveal a portion of the silicon substrate in the trench between the first and second portions of the silicon substrate. Ions are then implanted to form a first source region in the first portion of the silicon substrate and to form a second source region in the second portion of the silicon substrate and to form a doped region in the revealed silicon substrate in the trench wherein the doped region in the trench extends from the first doped source region to the second doped source region.


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