Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
1999-11-17
2003-04-15
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S700000, C438S706000, C438S712000
Reexamination Certificate
active
06548410
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to wires for semiconductor devices, and in particular to a method of fabricating wires for semiconductor devices suitable for a multi-layers wires constitution.
2. Description of the Background Art
A conventional method of fabricating wires for semiconductor devices will now be explained with reference to
FIGS. 1
a
to
1
h.
Referring to
FIG. 1
a
, an oxide film is deposited on a semiconductor substrate
100
as a first insulation film
101
. A titanium nitride (TiN) film is deposited on the first insulation film
101
as a glue layer
102
. A tungsten film (W) which is a first conductive layer
103
is deposited on the glue layer
102
.
Thereafter, a photoresist film pattern (not shown) is formed on the first conductive layer
103
. The first conductive layer
103
and the glue layer
102
are etched by using the photoresist film pattern as a mask, and thus a first conductive layer pattern
103
a
is formed on the first insulation film
101
, as illustrated in
FIG. 1
b
. The first conductive pattern
103
a
is hereinafter referred to as lower wires
103
a
. The glue layer
102
formed under the first conductive layer is also patterned, and thus becomes a glue layer pattern
102
a.
Referring to
FIG. 1
c
, a silicon oxide film is formed at the upper portions of the lower wires
103
a
and the first insulation film
101
as a second insulation film. A photoresist film pattern
105
is formed at the upper portion of the second insulation film. The photoresist film pattern
105
has an opening
106
at a predetermined portion on the lower wires
103
a.
As illustrated in
FIG. 1
d
, the second insulation film
104
is selectively etched by a reactive ion etching (RIE) by using the photoresist film pattern
105
as a mask, thus forming a contact hole
107
or via hole
107
at a predetermined portion on the lower wires
103
a.
As integration of the semiconductor devices is increased, the contact hole or via hole
107
is decreased in diameter (D). Recently, the contact hole is formed to have a diameter equal to or less than 0.2 &mgr;m. In addition, the improved integration of the semiconductor devices makes a height (h) of the contact hole or via hole
107
increased. As a result, an aspect ratio of the contact hole is increased, thus causing many problems in a process of fabricating wires in the semiconductor device.
The semiconductor substrate
100
illustrated in
FIG. 1
d
is transferred to a device for depositing a metal film. As shown in
FIG. 1
e
, while the semiconductor substrate
100
is transferred, a natural oxide film
108
is formed on an entire structure of the semiconductor substrate
100
.
A precleaning process is carried out on the semiconductor substrate
100
as shown in
FIG. 1
e
in order to remove the natural oxide film
108
. As the precleaning process, there are used a wet etching of dipping and rinsing the semiconductor substrate in an HF solution or a sputtering method using an argon (AR) gas. When the AR sputtering method is employed, process conditions are as follows.
Pressure in chamber: approximately 2 mTorr
Source power for generating a plasma: 400 W(13.56 MHz)
Bias power: 270 W(400 KHz)
Process time: 10 seconds
Ar gas flowing amount: 10 cc/min
Thereafter, referring to
FIG. 1
f
, a titanium (Ti) film or a titanium nitride (TiN) film is formed as an adhesion layer or a glue layer
109
on the entire structure of the semiconductor substrate
100
where the natural oxide film
108
is removed, namely at the upper portion of the second insulation film
104
and the inner wall and lower portion of the contact hole or via hole
107
. A metal layer, especially a tungsten is not deposited well on the silicon oxide film which composes the second insulation film
103
.
Accordingly, the adhesion layer or glue layer
109
is formed so that the metal layer can be firmly adhered at the upper portion of the second insulation film
104
and in the contact hole
107
, during a process for forming upper wires, namely a process for depositing a metal layer.
Then, the tungsten film
110
is deposited on the adhesion layer or glue layer
109
by a chemical vapor deposition. The tungsten film
110
is deposited at a sufficient thickness to fill up the contact hole
107
, and thus is also formed on the adhesion layer
109
at the upper portion of the second insulation film
110
. As shown in
FIG. 1
g
, a chemical mechanical polishing (CMP) or an etchback process is carried out on the tungsten film
110
, thereby removing the tungsten film deposited on the second insulation film
104
. As a result, a tungsten plug
110
a
is formed in the contact hole
107
.
Referring to
FIG. 1
h
, a metal film is formed as a conductive layer on the entire structure in
FIG. 1
f
, and patterned, thus forming the upper wires
111
.
In accordance with the conventional method of fabricating the wires for the semiconductor devices, the tungsten is not deposited well on the insulation film, especially on the oxide film. Therefore, it is required to form the glue layer or adhesion layer on the second insulation film and at the inner walls of the contact hole before forming the tungsten plug.
In addition, after the blanket tungsten film is formed on the entire structure of the semiconductor substrate in order to form the tungsten plug, while the tungsten film at the upper portion of the insulation film is removed by the etchback or CMP process, a number of particles are generated, and thus a fabricating rate of the semiconductor device is reduced.
Besides, the etchback or CMP process is further included, as compared with the process of selectively filling the tungsten in the contact hole. Accordingly, the fabricating process of the semiconductor device is more complicated.
As shown in
FIG. 2
, in case of a contact hole
200
having a high aspect ratio, a step coverage of the adhesion layer
201
is inferior at the lower portion of the contact hole
200
, and as a result the tungsten film is not deposited well thereon. After the tungsten plug
202
is formed, a void
203
is formed at the lower portion of the contact hole
200
, and thus a contact between the tungsten plug
202
and the lower wires
204
is inferior, and a contact resistance is increased.
When the adhesion layer is formed thicker in order to improve its step coverage at the lower portion of the contact hole, an overhang takes place at the edge portions of the entrance of the contact hole, and thus a keyhole is generated at the lower portion of the contact hole after deposition of the tungsten film, thereby increasing a wires resistance.
SUMMARY OF THE INVENTION
It is therefore a primary object of the present invention to provide a method of fabricating wires for semiconductor devices having a low wires resistance and a low contact resistance.
It is another object of the present invention to provide a method of fabricating wires for semiconductor devices which can reduce a wires resistance and a contact resistance merely by changing conditions of a precleaning process carried out when fabricating the wires for the semiconductor devices.
It is still another object of the present invention to provide a method of fabricating wires for semiconductor devices which can increase a fabricating rate of the semiconductor devices by omitting an etchback process and preventing generation of particles, and which can improve productivity by simplifying a fabricating process.
It is still another object of the present invention to provide a method of fabricating wires for semiconductor devices which can simplify a fabricating process by omitting a process of forming an adhesion layer performed before forming a plug.
In order to achieve the above-described objects of the present invention, there is provided a method of fabricating wires for semiconductor devices including: a step of forming a first insulation film; a step of forming lower wires on the first insulation film; a step of forming a second insulation film on the lower wires; a step of forming a
Hyundai Electronics Industries Co,. Ltd.
Umez-Eronini Lynette T.
Utech Benjamin L.
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