Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1996-06-03
1998-09-08
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438164, 438166, 438513, 438530, 438798, 438913, 148DIG76, 148DIG90, H01L 2100
Patent
active
058044710
ABSTRACT:
A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one of these vacuum apparatuses is a laser.
REFERENCES:
patent: 4322253 (1982-03-01), Pankove et al.
patent: 4552595 (1985-11-01), Hoga
patent: 4576851 (1986-03-01), Iwamatsu
patent: 4589951 (1986-05-01), Kawamura
patent: 4609407 (1986-09-01), Masao et al.
patent: 4663829 (1987-05-01), Hartman et al.
patent: 4719123 (1988-01-01), Haku et al.
patent: 4888305 (1989-12-01), Yamazaki et al.
patent: 4937205 (1990-06-01), Nakayama et al.
patent: 5174881 (1992-12-01), Iwasaki et al.
patent: 5186718 (1993-02-01), Tepman et al.
patent: 5194398 (1993-03-01), Miyachi et al.
patent: 5200017 (1993-04-01), Kawasaki et al.
patent: 5292675 (1994-03-01), Codama
patent: 5310410 (1994-05-01), Begin et al.
patent: 5314538 (1994-05-01), Maeda et al.
patent: 5314839 (1994-05-01), Mizutani et al.
patent: 5324360 (1994-06-01), Kozuka
patent: 5581092 (1996-12-01), Takemura
patent: 5595638 (1997-01-01), Konuma et al.
patent: 5608232 (1997-03-01), Yamazaki et al.
patent: 5608251 (1997-03-01), Konuma et al.
patent: 5620905 (1997-04-01), Konuma et al.
patent: 5639698 (1997-06-01), Yamazaki et al.
Takemura Yasuhiko
Takenouchi Akira
Yamazaki Shunpei
Ferguson Jr. Gerald J.
Niebling John
Pham Long
Semiconductor Energy Laboratory Co,. Ltd.
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