Method of fabricating strain-silicon CMOS

Details Method of fabricating strain-silicon CMOS Method of fabricating strain-silicon CMOS

2005-03-31

2008-09-30

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S288000, C257S341000, C257S350000, C257S351000, C257S401000

Reexamination Certificate

active

07429775

ABSTRACT:
Recesses are formed in the drain and source regions of an MOS transistor. The recesses are formed using two anisotropic etch processes and first and second sidewall spacers. The recesses are made up of first and second recesses, and the depths of the first and second recesses are independently controllable. The recesses are filled with a stressed material to induce strain in the channel, thereby improving carrier mobility. The widths and depths of the first and second recesses are selectable to optimize strain in the channel region.

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