Method of fabricating shallow trench isolation

Details Method of fabricating shallow trench isolation Method of fabricating shallow trench isolation

1998-03-18

1999-11-09

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Liquid phase etching

216 39, 216 51, 216 99, 438750, H01L 2100, B44C 122

Patent

active

059814020

ABSTRACT:
A method of fabricating shallow trench isolation with multi-step HDP process for avoiding kinks is described. This method is to form two insulator layers with different etching rates, the etching rate of outer insulator layer being slower than that of inner insulator layer. Additionally, use of a multi-step HDP process produces better gapfilling and avoid clipping phenomenon in shallow trench isolations. This method comprises the following steps. A substrate having a mask layer thereabove is provided. A pattern is defined on the mask layer to form a trench. Then, a first insulator layer, which covers the inner wall of the trench and the top surface of the mask layer, is formed. Next, a second insulator layer is formed in the trench and over the first insulator layer, the etching rate of the first insulator layer being slower than that of the second insulator layer. The first and the second insulator layer are removed, using said mask layer as a etching stop layer. The mask layer is removed, leaving a salient plug of the first and the second insulator layer. Finally, the salient plug to first and second insulator layers is etched by isotropic etching to the level of the substrate.

REFERENCES:
patent: 4714520 (1987-12-01), Gwozdz
patent: 5328559 (1994-07-01), Jerman
patent: 5350492 (1994-09-01), Hall et al.
patent: 5767017 (1998-06-01), Armacost et al.

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