Method of fabricating semiconductor probe with resistive tip

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive

Reexamination Certificate

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C257SE21154

Reexamination Certificate

active

07338831

ABSTRACT:
Provided is a method of fabricating a semiconductor probe with a resistive tip. The method includes steps of forming a mask layer on a substrate doped with first impurities and forming first and second semiconductor electrode regions heavily doped with the second impurities on the substrate uncovered by the mask layer, annealing the first and second semiconductor electrode regions and diffusing the second impurities of the first and second semiconductor electrode regions to portions facing each other to form resistive regions lightly doped with the second impurities at the outer boundaries of the first and second semiconductor electrode regions, and patterning the mask layer in a predetermined shape and etching a portion of a top surface of the substrate not covered by the patterned mask layer to form a resistive tip.

REFERENCES:
patent: 5618760 (1997-04-01), Soh et al.
patent: 5648300 (1997-07-01), Nakayama et al.
patent: 6049424 (2000-04-01), Hamagishi
patent: 6479892 (2002-11-01), Hopson et al.
patent: 10-239331 (1998-09-01), None
patent: 2002-340770 (2002-11-01), None
patent: WO 03/062742 (2003-07-01), None

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