Method of fabricating semiconductor integrated circuit devices

Details Method of fabricating semiconductor integrated circuit devices Method of fabricating semiconductor integrated circuit devices

1983-01-11

1984-09-04

Ozaki, G.

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29578, 29577C, 29576B, H01L 2122

Patent

active

044695357

ABSTRACT:
A method of fabricating semiconductor integrated circuit devices having a semiconductor region in a position separated by a predetermined distance from a dielectric isolating region provided on the surface of a semiconductor wafer, comprising the steps of forming a first mask to define the dielectric isolating region and semiconductor region, forming a second mask over the first mask so as to cover the region which is to become the semiconductor region, and removing the second mask after the dielectric isolating region has been formed by the first and second masks, to form the semiconductor region. The method thus permits the semiconductor region to be self-aligned with the dielectric isolating region.

REFERENCES:
patent: 3992232 (1976-11-01), Kaji et al.
patent: 4111724 (1978-09-01), Ogiue et al.
patent: 4376664 (1983-03-01), Hataishi
patent: 4378260 (1983-03-01), Fukuda et al.
patent: 4380480 (1983-04-01), Shimbo

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