Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-04-30
2002-11-26
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S690000
Reexamination Certificate
active
06486049
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to a method for providing a semiconductor device including contact studs for contacting a semiconductor substrate, said contact studs being embedded in an insulating structure. The present invention also relates to a corresponding semiconductor device.
BACKGROUND OF THE INVENTION
Hereinbelow, the technical term semiconductor substrate is used in a general sense, i.e. said substrate may be a wafer substrate, a wafer substrate carrying an integrated circuit, a multi-wafer substrate and so on.
FIGS. 1 and 2
are schematic illustrations of process steps of a known method for providing a semiconductor device including contact studs for contacting a semiconductor substrate, said contact studs being embedded in an insulating structure.
In
FIG. 1
, reference sign
10
denotes a semiconductor substrate carrying an integrated circuit, which is not shown in detail here. Although not limited thereto, in this example, the semiconductor substrate
10
is a silicon substrate. Reference sign
20
denotes an oxide layer having holes, wherein contact studs are to be formed. To form said contact studs, in a first step a liner layer
30
made of titanium is deposited in a conformal deposition process. In a second step, on said liner layer
30
a metal layer
40
made of tungsten is deposited such that it covers the whole structure which results in the status shown in FIG.
1
.
As may be seen from
FIG. 2
, in a third step a metal polish is performed by a chemical-mechanical polishing step CMP
1
in order to remove the tungsten layer
40
and the titanium layer
30
from the upper surface of the insulating oxide layer
20
such that said contact studs
100
are formed. During said metal polishing, the upper surface of said oxide layer
20
incurs micro-scratching effects leaving micro-scratches
60
on said upper surface. Moreover, liner residuals
50
may be left on said upper surface and/or in said micro-scratches
60
of said oxide layer
20
. In addition, if the metal polishing step is performed too long, the contact studs can protrude too far up and cause metal openings on subsequent layers, as indicated in FIG.
2
. Also, there may be a loss or distortion of oxide defined features such as overlay and alignment marks.
The liner residuals
50
and the subsequently performed metal position in the micro-scratches
60
can cause shorts when they go untreated. In addition, there can also be an area where residuals
50
from subsequent processing steps, either wet or dry, can be a source of additional defects or contamination.
The present invention seeks to provide a method for providing a semiconductor device including contact studs for contacting a semiconductor substrate, said contact studs being embedded in an insulating structure, which mitigate or avoid these and other disadvantages and limitations of the prior art.
REFERENCES:
patent: 5354712 (1994-10-01), Ho et al.
patent: 5575885 (1996-11-01), Hirabayashi et al.
patent: 5925501 (1999-07-01), Zhang et al.
Maltabes John
Zeindl Hans
Clingan, Jr. James L.
Elms Richard
Motorola Inc.
Owens Beth E.
LandOfFree
Method of fabricating semiconductor devices with contact... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating semiconductor devices with contact..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating semiconductor devices with contact... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2987124