Method of fabricating semiconductor device with capacitor

Details Method of fabricating semiconductor device with capacitor Method of fabricating semiconductor device with capacitor

1998-05-26

2004-03-23

Pham, Long (Department: 2814)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

Reexamination Certificate

active

06709991

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device and more particularly, to a method of fabricating a semiconductor device having a capacitor equipped with a dielectric film made of a high dielectric-constant or ferroelectric material.
2. Description of the Related Art
A conventional semiconductor memory device Including a storage capacitor equipped with a ferroelectric film as a capacitor dielectric is disclosed In the Japanese Non-Examined Patent Publication No. 7-50391 published in February 1995. In this memory device, the storage capacitor is implemented by using conventional fabrication processes or techniques for silicon-based semiconductor integrated circuit devices.
This conventional memory device utilizes the residual polarization of a ferroelectric film for storing the information. The ferroelectric film is applied with a positive or negative bias voltage to thereby cause polarization in the ferroelectric film. The polarization thus caused in the ferroelectric film is left due to the residual polarization even after the application of the bias voltage is stopped, This means that this memory device serves as a non-volatile memory.
FIG. 1
shows the configuration of the conventional semiconductor memory device disclosed in the Japanese Non-Examined Patent Publication No. 7-50391.
In
FIG. 1
, an isolation insulating film
102
is formed on a single-crystal silicon substrate
101
to define an active region. In the active region, a source region
104
a
and a drain region
104
b
are formed in the substrate
101
, and a gate electrode
105
is formed over the substrate
101
through a gate insulating film
103
between the source and drain regions
104
a
and
104
b
, thereby forming a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET).
An interlayer insulating film
106
is formed to cover the MOSPET and the isolation insulating film
102
.
A lower electrode
107
of a storage capacitor is formed on the interlayer insulating film
106
. A ferroelectric film
108
of the storage capacitor is formed on the lower electrode
107
to be partially overlapped therewith. An upper electrode
109
of the storage capacitor is formed on the ferroelectric film
108
to be entirely overlapped therewith.
A first protection film
115
is formed on the interlayer insulating film
106
to cover the storage capacitor and the MOSFET.
A metallic wiring film
113
a
is formed on the first protection film
115
to be electrically connected to the upper electrode
109
of the capacitor through a contact hole
111
a
and the source region
104
a
of the MOSFET through a contact hole
112
a
. The contact hole
111
a
penetrates the first protection film
115
alone. The contact hole
112
a
penetrates the first protection film
115
and the interlayer insulating film
106
.
A metallic wiring film
113
b
is formed on the first protection film
115
to be electrically connected to the lower electrode
107
of the capacitor through a contact hole
111
b
. The contact hole
111
b
penetrates the first protection film
115
alone.
A metallic wiring film
114
is formed on the first protection film
115
to be electrically connected to the drain region
104
b
of the MOSFET through a contact hole
112
b
. The contact hole
112
b
penetrates the first protection film
115
and the interlayer insulating film
106
.
Asilicon dioxide (SiO
2
) subfilm
116
a
, which is doped with phosphorus (P), is formed on the first protection film
115
to cover the metallic wiring films
113
a
,
113
b
, and
114
. Another SiO
2
subfilm
116
b
, which is not doped with phosphorus, is formed on the SiO
2
subfilm
116
a
. These two SiO
2
subfilms
116
a
and
116
b
constitute a second protection film
116
.
As the first protection film
115
, a silicon dioxide (SiO
2
) or silicon nitride (SiN
x
) is typically used. A silicon oxide or silicon nitride film is usually formed by a Chemical Vapor Deposition (CVD) process using a gaseous source, a sputtering process using a solid source, or a coating and sintering process using a liquid source.
With the CVD process for SiO
2
or SiN
x
using a gaseous source, a source gas for silicon (Si) tends to contain hydrogen (H) or hydrogen compound chemically bonded with silicon serving as a film formation species. A typical example of the source gas for silicon is mono-silane (SiH
4
). The source gas for Si is usually decomposed during the CVD process with the use of heat or plasma.
It has been known that a lot of activated hydrogen (i.e., hydrogen radical) tends to be generated in an atmosphere during a gas-source CVD process using a hydrogen-containing source gas for silicon, and the activated hydrogen thus generated reduces the ferroelectric film
108
of the storage capacitor to thereby degrade the performance or characteristics of the capacitor.
The effect of hydrogen to lanthanum-doped lead zirconate titanate (PZT, PbZr
1−x
Ti
x
O
3
), i.e., PLZT, was reported in an article, International Electron Devices Meeting (IEDM), Technical Digest, December 1994, pp. 337-340, which was written by R. Khamankar et al. and entitled “IMPACT OF POST PROCESSING DAMAGES ON THE PERFORMANCE OF HIGH DIELECTRIC CONSTANT PLZT THIN FILM CAPACITORS FOR ULSI DRAM APPLICATIONS”.
This article describes the effect of hydrogen, nitrogen (N
2
) plasma, and x-ray to a semiconductor memory device equipped with a ferroelectric storage capacitor including a PLZT film, and the polarization degradation of the PLZT film and the leakage-current increase of the storage capacitor. This article also describes the repair of the damage or degradation of the PLZT film or capacitor thus caused by a specific thermal annealing process.
FIG. 2
shows the relationship of the polarization degradation Q
c
′ of the PLZT film of the hydrogen-damaged device with the bias voltage applied thereto while using the annealing temperature as a parameter, The memory device is exposed to a forming gas made of 5% hydrogen (H
2
) and 95% nitrogen (N
2
), and is damaged due to hydrogen in the forming gas. The thermal annealing process is performed in an atmosphere containing nitrogen (N
2
) or oxygen (O
2
). The word “FRESH” in
FIG. 2
means the case where the memory device
19
not damaged due to exposure to hydrogen.
FIG. 3
shows the relationship of the leakage current density of the storage capacitor of the damaged device with the lanthanum (La) concentration of the PLZT film. The memory device is exposed to the H
2
/N
2
forming gas, N
2
plasma, or x-ray. The word “FRESH” in
FIG. 3
means the case where the memory device is not damaged due to exposure to hydrogen, plasma, nor x-ray.
Since each of PZT and PLZT is a composite metallic oxide, it tends to be reduced by activated hydrogen contained in the atmosphere. Due to this reduction, oxygen is released from the matrix of the oxide to thereby form defects. As a result, electrons tend to become unstable due to the defects thus formed, degrading the electric insulating capability. This leads to the decrease in polarization and increase in leakage current.
To form the contact holes
111
a
and
111
b
penetrating the protection film
115
in the conventional semiconductor memory device shown in
FIG. 1
, the protection film
115
needs to be etched by a wet process using a liquid such as an acid or a dry process using plasma. It is needless to say that the dry process is preferred to the wet process, because of its higher fabrication yield.
In a conventional dry etching processes, a fluorocarbon-system gas is typically used as an etching gas. For example, to ensure a satisfactorily high selection ratio between silicon and silicon oxide, it is typical that the etching gas contains hydrogen. For example, trifluoromethane (CHF
3
) alone or a mixture of trifluoromethane and hydrogen is often used.
Similar to the above-described case of the gas-source CVD process using a hydrogen-containing source gas for silicon, activated hydrogen tends to be generated in an etching atmosphere, and t

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