Method of fabricating semiconductor device

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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Details

C438S627000, C438S628000, C438S653000, C438S626000

Reexamination Certificate

active

07323419

ABSTRACT:
A method of fabricating a semiconductor device including a high-k dielectric for as a gate insulating layer is provided. The method includes forming a high-k dielectric layer and a conductive layer on a substrate, dry etching a portion of the conductive layer, performing a process to increase a wet etch rate of a remaining portion of the conductive layer, and forming a conductive layer pattern by wet etching the remaining portion of the conductive layer after performing the plasma process or the ion implantation. The process to increase the wet etch rate of the conductive layer including a plasma process and/or an ion implantation on the remaining portion of the conductive layer.

REFERENCES:
patent: 4381215 (1983-04-01), Reynolds et al.
patent: 6208004 (2001-03-01), Cunningham
patent: 6534223 (2003-03-01), Yang
patent: 6642132 (2003-11-01), Cho et al.
patent: 2004/0113171 (2004-06-01), Chiu et al.
patent: 2004-247573 (2004-09-01), None
patent: 10-2001-0018819 (2001-03-01), None

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