Method of fabricating semiconductor device

Details Method of fabricating semiconductor device Method of fabricating semiconductor device

1999-03-16

2001-05-15

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S699000, C438S780000

Reexamination Certificate

active

06232246

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a method of fabricating a semiconductor device, including the step of forming a SiO
2
film, as an interlayer insulating film covering an interconnection pattern, using ozone and an organic silicon source.
In fabrication of a semiconductor device, a multi-layer interconnection structure is generally formed in accordance with the following procedure. A resist pattern is first formed on an interconnection layer having been formed on a semiconductor substrate, and an interconnection pattern is formed by etching using the resist pattern as a mask. The entire surface of the semiconductor substrate is then treated using an organic amine based resist releasing liquid to remove sub-products such as polymers produced by etching, and an interlayer insulating film is formed on the interconnection pattern thus treated. After that, the next interconnection pattern is similarly formed, to thus form the multi-layer interconnection structure.
Along with the recent trend toward higher density and higher integration of semiconductor devices, the technique of forming the multi-layer interconnection structure becomes increasingly important in fabrication of semiconductor devices. In particular, with respect to an interlayer insulating film, it is required that spaces between interconnections of a fine interconnection pattern are buried with the interlayer insulating film without occurrence of any cavity and that surface steps of the interlayer insulating film are planarized. To meet all of these requirements, however, the interlayer insulating film still has various technical problems.
As an interlayer insulating film having excellent step coverage and self-planarization characteristics and capable of solving the above problems, attention is being given to a SiO
2
film formed using ozone and an organic silicon source, especially, a SiO
2
film formed at a normal pressure using TEOS (Tetra Ethyl Ortho Silicate) as the organic silicon source [hereinafter, referred to as “O
3
-TEOS-NSG (Nondoped Silicate Glass) film”].
FIG. 3
shows an apparatus for forming such a O
3
-TEOS-NSG film, which apparatus includes a film formation unit
2
for forming a film on a wafer (Si Substrate), and a carrier unit
4
having a belt
3
for carrying the wafer.
The film formation unit
2
has a muffle
5
disposed to extend along the movement direction of the belt
3
and to cover part of the belt
3
, and four injectors
6
sequentially arranged in the movement direction of the belt
3
. Each injector
6
is disposed directly over the belt
3
in such a manner that the lower portion of the injector
6
is positioned in the muffle
5
. The four injectors
6
have the same configuration. In the example shown in
FIG. 3
, the injectors
6
are connected, directly or indirectly by way of pipes, to a supply unit
7
for supplying TEOS, a O
3
generating unit
8
, a nitrogen supply unit (not shown), and an exhaust pipe
9
connected to an exhaust device (not shown).
FIG. 4
is a typical view of the injector
6
. As shown in
FIG. 4
, the injector
6
is designed to supply, onto a wafer W placed on the belt
3
, a mixed gas (O
3
/O
2
) and TEOS which are separated from each other by means of nitrogen.
To be more specific, the injector
6
has a rectangular pallelopiped housing
10
with its bottom opened, a partition box
11
provided in the housing
10
, and a blowout portion
12
provided in the partition box
11
. The blowout portion
12
is connected to the supply unit
7
, O
3
generating unit
8
and nitrogen supply unit by way of pipes, and the gases supplied therefrom are separated from each other in the blowout portion
12
by means of partition plates (not shown). Upon blowout of the reaction gases, namely, the mixed gas (O
3
/O
2
) and TEOS gas from the blowout portion
12
on the wafer W, nitrogen (separator N
2
) is allowed to flow between these reaction gases. The exhaust pipe
9
is connected between the housing
10
and the partition box
11
in order to forcibly exhaust, from the surface of the wafer W, the residue of the gases having been supplied on the wafer W and used to react with each other for forming a O
3
-TEOS-NSG film.
The carrier unit
4
includes the belt
3
for carrying the wafer W placed on the belt
3
, and a belt drive unit
13
, such as a motor, for moving the belt
3
. A heating chamber
14
for heating the wafer W in a N
2
atmosphere, a ultrasonic cleaning bath
15
, a rinse bath
16
, and an HF etching bath
17
are sequentially arranged along the movement direction (shown by the arrow) of the belt
3
.
In the film formation apparatus
1
having the above configuration, O
3
and TEOS supplied from the four injectors
6
onto the wafer W carried by the belt
3
react with each other on the wafer W, to form a O
3
-TEOS-NSG film on the wafer W.
The thickness of the O
3
-TEOS-NSG film formed by the above film formation apparatus
1
, however, largely varies depending on the distance between interconnections of an interconnection pattern, namely, it exhibits the pattern dependency.
For example, as will be described later in Comparative Examples 1 and 2, an Al (Aluminum) interconnection pattern of Al interconnections each having a width of 600 nm and a height of 650 nm is formed on a semiconductor substrate in such a manner that the Al interconnections are spaced from each other at specific intervals, followed by treatment of the entire surface of the semiconductor substrate with a related art organic amine based resist releasing liquid, and a O
3
-TEOS-NSG film is formed by the above film formation apparatus
1
. In this case, the space width (distance) between the Al interconnections of the Al interconnection pattern and the thickness of the O
3
-TEOS-NSG film formed on the Al interconnection pattern exhibits a relationship shown in FIG.
7
. As is apparent from the figure, the thickness of the O
3
-TEOS-NSG film formed on the Al interconnection pattern largely varies depending on the distance between the Al interconnections of the Al interconnection pattern.
If there occurs a larger variation in thickness of the O
3
-TEOS-NSG film in fabrication of a semiconductor device, the difference in thickness of the O
3
-TEOS-NSG film remains even by planarizing the O
3
-TEOS-NSG film by etching-back after formation of the O
3
-TEOS-NSG film, with a result that steps are formed in the interconnection pattern within a chip. In this case, if the step is larger than the focal depth of photolithography, there occurs a problem that it is difficult to perform the subsequent photo-resist treatment.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of fabricating a semiconductor device, including the step of forming a SiO
2
film such as a O
3
-TEOS-NSG film using ozone and an organic silicon source on an interconnection pattern formed on a semiconductor substrate, which method is capable of reducing the pattern dependency on the thickness in the SiO
2
film formed on the interconnection pattern, thereby allowing photolithgraphy subsequent to formation of the SiO
2
film to be performed without occurrence of any problem.
The above-described problem are overcome according to the present invention, and experimentally found that in the case where an interconnection pattern is formed by etching and subsequent treatment of the interconnection pattern and a portion, not covered with the interconnection pattern, of the substrate surface using an organic amine based resist releasing liquid to remove sub-products produced by etching, the components of the organic amine based resist releasing liquid exerting a large effect on the pattern dependency of the thickness in a SiO
2
film such as a O
3
-TEOS-NSG film to be formed later.
According to the present invention, there is provided a method of fabricating a semiconductor device, including the steps of: forming an interconnection pattern on the surface of a semiconductor substrate by etching;treating the interconnection pattern and a portion, not covered with t

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