Method of fabricating semiconductor device

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation

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438633, 438637, 438645, 438692, 438778, H01L 2176

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060514779

ABSTRACT:
A method of fabricating a SOI wafer is disclosed, which comprises the steps of: providing a silicon-on-insulator wafer wherein an oxide is formed between a base substrate and a devise substrate; thinning the device substrate to form a Si layer; etching the Si layer to expose the surface of the oxide film, to form trenches; forming polishing stoppers within the trenches, each polishing stopper have a smaller thickness in its center portion and a greater thickness in its outer portion; heat-treating the polishing stopper; and polishing, via chemical and mechanical polishing, the Si layer using the polishing stopper to form a device formation layer.

REFERENCES:
patent: 5212114 (1993-05-01), Grewal et al.
patent: 5229331 (1993-07-01), Doan et al.
patent: 5234535 (1993-08-01), Beyer et al.
patent: 5413952 (1995-05-01), Pages et al.
patent: 5449638 (1995-09-01), Hong et al.
patent: 5646053 (1997-07-01), Schepis et al.
English translation of Abstract for JP 04-67634 (Mar. 3, 1992).

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