Method of fabricating semiconductor device

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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Details

C716S030000, C716S030000, C700S129000

Reexamination Certificate

active

07488691

ABSTRACT:
A method of fabricating a semiconductor device of the present invention includes a step (S100) of judging whether an interconnect pitch of an interconnect pattern having the smallest interconnect pitch out of all interconnect patterns to be formed in the insulating film is not larger than a predetermined value or not; a step (S104) of determining the thickness of the lower resist film corresponding to the interconnect pitch, if the interconnect pitch is judged as being not larger than a predetermined pitch, in the step of judging whether the interconnect pitch is not smaller than the predetermined value; and a step (S106) of forming, on the insulating film, the lower resist film having the thickness determined in step S104by using a multi-layered resist.

REFERENCES:
patent: 5986477 (1999-11-01), Jiang et al.
patent: 2004/0172610 (2004-09-01), Liebmann et al.
patent: 2007/0259291 (2007-11-01), Bucchignano et al.
patent: 2002-93778 (2002-03-01), None
patent: 2002-270584 (2002-09-01), None
patent: 2004-47511 (2004-02-01), None
patent: 2004-281832 (2004-10-01), None
patent: 2005-203563 (2005-07-01), None
patent: 2006-53543 (2006-02-01), None

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