Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1996-05-09
1998-09-29
Chaudhari, Chandra
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438763, 438970, H01L 213205
Patent
active
058145532
ABSTRACT:
The process of the present invention has numerous advantages over the prior art. The silicon nitride side-wall spacers permit a small contact hole thus miniaturizing the cell beyond lithographic limits. The side-wall spacers composed of silicon nitride and silicon dioxide avoid to expose the polysilicon when the contact window is formed by etching step. Moreover, the highly selective etching process improve the accuracy of the contact window.
REFERENCES:
patent: 5053351 (1991-10-01), Fazan et al.
patent: 5364804 (1994-11-01), Ho et al.
patent: 5573965 (1996-11-01), Chen et al.
Chuang Andy
Wu Tzong-Shien
Chaudhari Chandra
United Microelectronics Corp.
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