Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
1999-08-26
2002-06-04
Huff, Mark F. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S314000, C430S317000, C430S318000, C216S066000, C438S040000, C438S673000, C438S713000
Reexamination Certificate
active
06399286
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 88110532, filed Jun. 23, 1999.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a fabrication method for a semiconductor device. More particularly, the present invention relates to a fabrication method for reducing the critical dimensions for the conductive lines and the space in between.
2. Description of the Related Art
In the fabrication of a semiconductor device, the resolution of the photolithography technique is limited, even though the short wave length deep ultraviolet (DUV) light is used. For example, the photolithography resolution of a DUV with a wavelength of 248 nm, is around 0.18 to 0.2 mm. A further increase in the density of a semiconductor device is thereby limited by the resolution of the current photolithography technique.
SUMMARY OF THE INVENTION
The present invention provides a method of fabricating a reduced critical dimension for the conductive line and the space to overcome the resolution limitation of the photolithography technique. This invention includes forming sequentially a material layer and a mask layer on a substrate, wherein the material layer, for example, is a conductive layer. A first taper etching is conducted to form multiple first openings with the cross-sections of the openings being tapered off from top to bottom exposing the surface of the material layer. A sacrificial layer is then formed on the exposed surface of the material layer. A second taper etching is conducted on the exposed mask layer to form multiple second openings with the cross-sections of the openings being tapered off from top to bottom. The sacrificial layer is then removed. Thereafter, an anisotropic etching is conducted to remove the exposed material layer, with the mask layer serving as a hard mask, forming multiple conductive lines followed by a removal of the mask layer.
According to the present invention, the critical dimension of the conductive line and of the space can be reduced. The conductive line width is a sum of the distance of the sidewalls of the first and the second openings being tapered off after the first and the second taper etching. The space between the conductive lines is at least a line width less than the regular photolithography resolution.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5340773 (1994-08-01), Yamamoto
patent: 5668039 (1997-09-01), Lin
patent: 6022776 (2000-02-01), Lien
patent: 6063708 (2000-05-01), Lee
patent: 6110837 (2000-08-01), Linliu
patent: 6177331 (2001-01-01), Koga
patent: 6232175 (2001-05-01), Liu et al.
Chan Bor-Wen
Liu Yuan-Hung
Barreca Nicole
Huang Jiawei
Huff Mark F.
J.C. Patents
Taiwan Semiconductor Manufacturing Corp.
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