Method of fabricating polycrystalline silicon-germanium thin fil

Details Method of fabricating polycrystalline silicon-germanium thin fil Method of fabricating polycrystalline silicon-germanium thin fil

1996-04-24

1998-05-19

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438162, 438166, 438487, 257 63, 257 65, 148DIG58, H01L 21268

Patent

active

057535418

ABSTRACT:
A method for fabricating a silicon-germanium thin film field effect transistor (TFT) with a high carrier mobility and a high on/off ratio. An amorphous silicon layer, an amorphous germanium layer and a gate insulating film are successively layered on an insulating substrate on which a pair of source and drain electrodes are formed. Next, the amorphous silicon layer and the amorphous germanium layer are converted into polycrystalline layers by thermal annealing at a temperature higher than 600.degree. C. or laser annealing. Then, a gate electrode is formed on the gate insulating film.

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