Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2006-01-24
2006-01-24
Coleman, David (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S032000, C438S039000, C438S098000, C438S459000
Reexamination Certificate
active
06989299
ABSTRACT:
A method for fabricating on-chip spacers for a TFT panel exposes a photoresist layer on top of the TFT panel using two exposure processes, one through the bottom of the TFT and the other through a mask over the TFT panel. The exposure process through the bottom exposes all photoresist covering windows on the TFT panel and leaves all photoresist corresponding to an opaque grid corresponding a TFT driving circuit. A second exposure process through a mask above the photoresist leaves part of the photoresist in the opaque grid unexposed. The exposed photoresist is removed leaving on-chip spacers only on the opaque grid. Therefore, the on-chip spacers can not affect the display quality and can be easily formed on a high dpi TFT panel.
REFERENCES:
patent: 5472889 (1995-12-01), Kim et al.
patent: 5618739 (1997-04-01), Takahashi et al.
patent: 5886761 (1999-03-01), Sasaki et al.
patent: 5914763 (1999-06-01), Fujii et al.
patent: 6118502 (2000-09-01), Yamazaki et al.
patent: 6400440 (2002-06-01), Colgan et al.
patent: 6411346 (2002-06-01), Numano et al.
patent: 2001/0019371 (2001-09-01), Zavracky et al.
Dai Yuan-Tung
Lee Chun-Chi
Liao Tsung-Neng
Coleman David
Forhouse Corporation
Maldonado Julio J.
Pelton, Esq. William E.
LandOfFree
Method of fabricating on-chip spacers for a TFT panel does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating on-chip spacers for a TFT panel, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating on-chip spacers for a TFT panel will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3553219