Method of fabricating mid-gap metal gates compatible with ultra-

Details Method of fabricating mid-gap metal gates compatible with ultra- Method of fabricating mid-gap metal gates compatible with ultra-

1996-10-30

1998-08-04

Dutton, Brian

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

H01L 213205

Patent

active

057893128

ABSTRACT:
A method of fabricating a mid-gap workfunction tungsten gate or W electrode directly onto a gate dielectric material for use in high speed/high density advanced MOS and CMOS devices is provided which utilizes low temperature/low pressure CVD of a tungsten carbonyl. MOS and CMOS devices containing one or more of the CVD W gates or W electrodes manufactured by the present invention are also provided herein.

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patent: 5539230 (1996-07-01), Cronin
patent: 5565247 (1996-10-01), Suzuki
Davari, B. "Submicron Tungsten Gate Mosfet with 10 nm Gate Oxide", 1987, VLSI Symposium, Japan.
Noda, Hiromasa, "Tungsten Gate Technology for Quarter-Micron Application", Jpn. J. Appl. Phys. vol. 35, (1996), pp. 807-811.

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