Method of fabricating metallized vias with steep walls

Details Method of fabricating metallized vias with steep walls Method of fabricating metallized vias with steep walls

1997-11-10

1999-04-27

Brown, Peter Toby

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438678, 438622, 438637, 438639, 438641, 438674, 216 13, 216 18, H01L 21283

Patent

active

058973680

ABSTRACT:
A method includes applying a first seed layer extending over a horizontal surface and via sidewalls of a dielectric material and exposed underlying contact metallization; removing at least some of the first seed layer from the contact metallization and the horizontal surface while leaving a sufficient amount of the first seed layer on the sidewalls as a catalyst for subsequent application of a third seed layer; sputtering a second seed layer over the contact metallization and the horizontal surface; using an electroless solution to react with the first seed layer and apply the third seed layer over the sidewalls; and electroplating an electroplated layer over the second and third seed layers.

REFERENCES:
patent: 4865873 (1989-09-01), Cole, Jr. et al.
patent: 4988412 (1991-01-01), Liu et al.
patent: 4999251 (1991-03-01), Foust et al.
patent: 5015517 (1991-05-01), Walsh
patent: 5230965 (1993-07-01), Cole, Jr. et al.
patent: 5287619 (1994-02-01), Smith et al.
patent: 5661080 (1997-08-01), Hwang et al.

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