Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
2001-05-17
2003-03-18
McPherson, John A. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S319000, C430S321000, C430S396000, C438S030000
Reexamination Certificate
active
06534246
ABSTRACT:
This application claims the benefit of Korean Application No. 2000-26767 filed May 18, 2000, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display and more particularly, to a method of fabricating liquid crystal display (LCD) device having shorting bars. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for effectively eliminating an electrostatic discharge as well as reducing a fabrication cost in the LCD device.
2. Discussion of the Related Art
As an information technologies rapidly develop, display devices are developed in accordance with the pace of the technology development. The display devices process and display a great deal of information. A cathode ray tube (CRT) has served as a mainstream of the display device area. However, to meet the needs of the current development, a flat panel display device having small size, light weight, and low power consumption is an important subject of research.
A thin film transistor liquid crystal display (TFT LCD) device is an example of the flat panel display devices. The TFT LCD device is very thin and provides superior color display properties. In operation, a thin film transistor serves as a switching element of the TFT LCD device. The thin film transistor of the TFT LCD device switches a pixel such that the pixel controls transmittance of incoming light, which is incident from a back light of the TFT LCD device.
An amorphous silicon layer is widely used for a silicon (active) layer of the thin film transistor. This is because the amorphous silicon layer can be formed on a large, but relatively cheap, glass substrate at a relatively low temperature. The above-mentioned amorphous silicon TFT (a-Si:TFT) is frequently used for thin film transistors.
FIG. 1
is a cross-sectional view illustrating a conventional LCD panel
20
. As shown in
FIG. 1
, the LCD panel
20
has lower and upper substrates
2
and
4
each having a substrate
1
and an interposed liquid crystal layer
10
therebetween.
More specifically, tie lower substrate
2
includes a TFT “S” as a switching element to change an orientation of liquid crystal molecules. A pixel electrode
14
formed thereon for applying a voltage to the liquid crystal layer
10
in accordance with the signals from the TFT “S”. The upper substrate
4
has a color filter
8
for implementing color. Further, a common electrode
12
is formed on the color filter
8
. The common electrode
12
also serves as an electrode for applying a voltage to the liquid crystal layer
10
. The pixel electrode
14
is arranged over a unit pixel portion “P”, i.e., a display area.
In addition, to prevent leakage of the liquid crystal layer
10
between the lower and upper substrates
2
and
4
, the lower and upper substrates
2
and
4
are sealed with a sealant
6
. The lower substrate
2
having the TFT “S” is referred to as an array substrate since a plurality of TFTs are formed in a shape of matrix.
A plurality of functional thin films including an insulating layer, a silicon layer, and a metal layer are repeatedly deposited and etched to fabricate the above-mentioned TFT LCD device. At this point, an electrostatic discharge must be prevented during the fabricating process for the TFT LCD device. If the electrostatic discharge occurs during the fabricating process, the above-mentioned functional thin films consisting of the thin film transistor “TFT” may be damaged.
To prevent the damage due to the above-mentioned electrostatic discharge, shorting bars are adopted for a typical TFT LCD device. The shorting bars are directly connected to each of the gate lines or data lines having a matrix shape such that each line involves an equi-potential with respect to the electrostatic discharge.
Although an amorphous silicon (a-Si:H) layer is widely used for the thin film transistor “S” of
FIG. 1
, a polysilion layer (poly-Si) is recently adopted for the TFT LCD device.
FIG. 2
is a plan view illustrating an array substrate
2
of a conventional TFT LCD device adopting the polysilicon layer. As shown in
FIG. 2
, a plurality of gate lines
30
are transversely formed whereas a plurality of data lines
40
are formed perpendicular to the gate lines
30
. Each gate line
30
crosses a corresponding data line
40
.
In addition, across one end portion of the gate lines
30
, a gate shorting bar
36
is formed to connect each of the gate lines
30
. The data lines
40
are also connected with a data shorting bar (not shown) formed across one end portion of the data lines
30
. For convenience, the following explanation is focused on the gate shorting bar
36
.
The gate shorting bar
36
is not actually used in driving the TFT LCD device. That is to say, the gate shorting bar
36
is etched away once it has performed functions of protecting the TFT LCD device from electrostatic discharge during the fabricating process for the TFT LCD device. Specifically during the final process for fabricating the array substrate
2
, the gate shorting bar
36
is broken at a plurality of line opening portions
38
such that first and second gate lines
30
a
and
30
b
and the like are independent of each other. The above-mentioned breaking step for he gate shorting bar
36
is usually performed together with the step of forming the TFT “S” shown in
FIG. 1. A
detailed explanation about the above-mentioned gate shorting bar
36
will be provided with reference to
FIG. 3
as follows:
FIG. 3
is an expanded plan view of the portion “A” shown in FIG
2
and shows a unit pixel region “P” of the array substrate
2
. The gate line
30
is transversely formed whereas the data line
40
is formed perpendicular to the gate line
30
. At the crossing point between the gate and data lines
30
and
40
, a thin film transistor “S” is formed. The thin film transistor “S” has a gate electrode
32
, a source electrode
42
, a drain electrode
44
, and an active layer
50
. The gate and source electrodes
32
and
42
are electrically connected with the gate and data lines
30
and
40
, respectively.
The drain electrode
44
is spaced apart from the source electrode
42
with a predetermined interval therebetween. In this process, the active layer
50
is made of polysilicon, for example. On the unit pixel region “P” defined by the gate and data lines
30
and
40
, a pixel electrode
14
is formed thereon. The thin film transistor “S” serves to control or switch data signals such that the data signals are applied to the pixel electrode
14
.
In addition, the gate shorting line
36
is formed parallel to the data line
40
, and is connected to the gate line
30
at one end of the gate line
30
. As shown in
FIG. 2
, the gate shorting line
36
is connected to all of the plurality of gate lines
30
such that the electrostatic discharge is prevented during the fabricating process for the array substrate
2
.
After all of the functional thin films are formed for the array substrate
2
, the gate shorting line
36
is broken at the line opening portion
38
such that the gate line
30
is electrically independent of the other gate lines (shown in FIG.
2
). As shown in
FIG. 2
, the gate shorting line
36
includes the plurality of line opening portions
38
such that all of the date lines
30
are independent of each other. With reference to
FIGS. 4A
to
4
D, a conventional fabricating process for the array substrate
2
will be explained in detail.
FIGS. 4A
to
4
D are sequential cross-sectional views taken along the line IV-IV of FIG.
3
. In
FIG. 4A
, a buffer layer
60
and an active layer
50
are sequentially formed on the substrate
1
of the array substrate
2
shown in FIG.
3
. The active layer
50
is formed of polysilicon (p-Si), which is achieved via a crystallization process. That is to say, an amorphous silicon layer is deposited on the substrate
1
, and then is recrystallized via a laser heat treatment, metal induced crystallization (MIC), and solid phase crystallization (SP
LG.Philips LCD Co. , Ltd.
McPherson John A.
Morgan & Lewis & Bockius, LLP
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