Method of fabricating interconnect of capacitor

Details Method of fabricating interconnect of capacitor Method of fabricating interconnect of capacitor

2000-10-05

2002-08-27

Elms, Richard (Department: 2824)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S386000, C438S393000, C438S396000, C438S782000

Reexamination Certificate

active

06440845

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to a method of fabricating an integrated circuit. More particularly, this invention relates to a method of fabricating an interconnection structure of a capacitor.
2. Description of the Related Art
The capacitor and inductor are the major devices in the oscillation circuit of a radio frequency (RF) device. A capacitor in the oscillation circuit is typically in a metal-insulator-metal (MIM) stack structure. That is, the capacitor includes a bottom metal electrode plate, an inter-metal dielectric layer (IMD) and a top metal electrode plate. The bottom metal electrode plate is electrically connected to the substrate, and the top metal electrode plate is electrically connected to another metal layer. The method for fabricating a such conventional capacitor is described as follows.
In
FIG. 1A
, a substrate
100
having a capacitor
110
that has been formed thereon is provided. The capacitor
110
comprises a bottom metal electrode plate
112
, an inter-metal dielectric layer
114
on the bottom metal electrode plate
112
and a top metal electrode plate
116
on the inter-metal dielectric layer
114
. A dielectric layer
130
is formed to cover the substrate
100
and the top metal electrode plate
116
.
In
FIG. 1B
, via holes
140
are formed within the dielectric layer
130
to expose a portion of the top metal electrode plate
116
. The via holes
114
are then filled with metal material to form plugs
150
, which completes the interconnect of the capacitor.
Using the conventional method described above, the quality factor (the Q-value) of the capacitor
110
is degraded. The reason is explained as follows. The Q value is equal to a ratio of the electric energy stored in the electrode plate to the energy consumption. The energy consumption is a sum of the energy consumed in the metal bottom electrode plate
112
, the metal top electrode plate
116
, the plugs
150
and the metal layer
160
. Because the cross section of the plug is small, the resistance is great which increases energy consumption. In addition, a skin effect is caused during a high frequency operation, that is, a majority of current is converged on a portion of the surface of the plugs
150
. The resistance of the capacitor is increased which results in higher energy consumption. Consequently, the Q value is decreased.
SUMMARY OF THE INVENTION
The invention provides a method of fabricating an interconnect of a capacitor. A substrate comprising a capacitor thereon is provided. The capacitor comprises a metal bottom electrode plate electrically connected to the substrate, an inter-metal dielectric layer on the metal bottom electrode plate and a metal top electrode plate on the inter-metal dielectric layer. A spin-on dielectric layer is formed to cover the metal top electrode plate of the capacitor and the substrate with a portion on the metal top electrode plate thicker than a portion on the substrate. The spin-on dielectric layer is etched back to expose a surface of the metal top electrode plate. A metal layer is formed on the spin-on dielectric layer and the metal top electrode plate to have a direct contact with the surface of the metal top electrode plate. The metal layer is then patterned to form an interconnect of the capacitor.
In the above method, if an inductor is formed on the substrate together with the capacitor, a surface of the inductor is also exposed after etching back the spin-on dielectric layer. The metal layer is thus formed in contact with not only the surface of the metal top electrode plate of the capacitor, but also the surface of the inductor. After being patterned, an interconnect of the inductor is also formed.
An interconnect of a capacitor is further provided by the invention. The interconnect comprises a metal layer formed on a dielectric layer and in contact with a metal top electrode plate of a capacitor. In addition to the top electrode plate, the capacitor further comprises a metal bottom electrode plate on a substrate and an inter-metal dielectric layer on the metal bottom electrode plate.
Thus formed, the interconnect of the capacitor is in direct contact with the metal top electrode plate, so that the resistance of the interconnect and the contact resistance between the interconnect and the capacitor is decreased to reduce the energy consumption. The Q factor can thus be enhanced effectively. In addition, when an inductor is formed on the same substrate on which the capacitor is formed, a direct contact between the interconnect and the inductor is also established to minimize the resistance, so that the Q factor of the inductor is also enhanced.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.


REFERENCES:
patent: 6140672 (2000-10-01), Arita et al.
patent: 6168985 (2001-01-01), Asano et al.
patent: 6180453 (2001-01-01), Sung et al.
patent: 6284586 (2001-09-01), Seliskar et al.
patent: 6313003 (2001-11-01), Chen
Lee et al., Application of HSQ (Hydrogen Silsesquioxane) Based SOG to Pre-Metal Dielectric Planarization in STC (Stacked Capacitor) DRAM, 1996, IEEE Symposium on VLSI Technology Digest of Technical Papers, pp 112-113.

Affiliated with

Also associated with

Rating

Method of fabricating interconnect of capacitor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating interconnect of capacitor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating interconnect of capacitor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2963739