Method of fabricating high performance BiCMOS structures having

Details Method of fabricating high performance BiCMOS structures having Method of fabricating high performance BiCMOS structures having

1986-07-16

1988-02-23

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 31, 437 57, 437 41, 437233, 156653, 156657, 357 43, 357 59, H01L 2972, H01L 2704

Patent

active

047270462

ABSTRACT:
A process is disclosed for simultaneously fabricating bipolar and complementary field effect transistors. The process enables distinguishing the bipolar devices from the CMOS devices with a single base mask 108, while requiring only a single additional mask 114 to define the bipolar emitter and MOS gates. The process forms the gate oxide 100 for the MOS devices at an early stage, then protects that oxide with polysilicon 103 during subsequent fabrication steps. Self-aligned metal silicide contacts 137 are separated from undesired regions using sidewall oxidation techniques.

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