Method of fabricating Group III-V compound semiconductor devices

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

438606, B44C 122

Patent

active

RE0361852

ABSTRACT:
etches GaAs-containing Group III-V compounds in the presence of other Group III-V compounds. As an illustration, Al.sub.y Ga.sub.1-y As is selectively etched in the presence of Al.sub.x Ga.sub.1-x As (0.ltoreq.y<0.2 & x>0.2) when the pH range of the etchant solution is between approximately 3 and 6. The etchant solution described herein may be utilized in the fabrication of, for example, high-frequency transistors exhibiting improved saturated current (I.sub.dss) and threshold voltage (V.sub.th) uniformity.

REFERENCES:
patent: 4486536 (1984-12-01), Baker et al.
patent: 4835101 (1989-05-01), Kao et al.
patent: 4914488 (1990-04-01), Yamane et al.
patent: 4935377 (1990-06-01), Strifler et al.
patent: 5041393 (1991-08-01), Ahrens et al.
patent: 5110765 (1992-05-01), Balakanti et al.
patent: 5215885 (1993-06-01), Marrujo et al.
DeSalvo, Gregory C., et al., "Etch Rates and Selectivities of Citric Acid/Hydrogen Peroxide on GaAs, Al.sub.0.3 Ga.sub.0.7 As, In.sub.0.2 Ga.sub.0.8 As, In.sub.0.53 Ga.sub.0.47 As, In.sub.0.52 Al.sub.0.48 As, and InP", J. Electrochem. Soc., vol. 139, No. 3, Mar. 1992, pp. 831-835.
Tong, M., et al., "Process for Enhancement/Depletion-Mode GaAs/InGaAs/AlGaAs Pseudomorphic MODFETs Using Selective Wet Gate Recessing", J. Electrochem. Soc., vol. 139, No. 3, Mar. 1992, pp. 1633-1634.
Broekaert, Tom P.E., et al., "Novel, Organic Acid-Based Etchants for InGaAlAs/InP Heterostructure Devices with AlAs Etch-Stop Layers", J. Electrochem. Soc., vol. 139, No. 3, Mar. 1992, pp. 2306-2309.
De Salvo, Tsens, Comas, "Etch rates and selectivities of Citricacid/hydrogen peroxide on GaAs, AlGaAs, InGaAs (In.sub.0.2 Ga.sub.0.8 As), (In.sub.0.53 Ga.sub.0.47 As); (In.sub.0.52 Al.sub.0.48 As) and Indium Phosphid". J. Electrochem, Soc., 139(3), 831-5. 76-3. (Electric Phenomena.).
"An edge-defined technique for fabricating submicron metal-semiconductor field effect transistor gates"; W.A. Strifler et al.; J. Vac. Sci. Technol. B8(6), Nov./Dec. 1990; pp. 1297-1299.
"Preferential etching of GaAs through photoresist masks"; M. Otsubo et al.; J. Electro. Chem Soc. 123,676 (1976); pp. 676-680.
"Use of thin AlGaAs and InGaAs stop-etch layers for reactive ion etch processing of III-V compound semiconductor devices"; C.B. Cooper III et al.; Appl. Phy. Let 51. (1987); pp. 2225-2226.
"Reactive ion etching damage to GaAs layers with etch stops"; C.M. Knoedler et al.; J. Vac. Sci. Technol B6, (1988); pp. 1573-1576.
"The role of aluminum in selective reactive ion etching of GaAs on AIGaAs.sup.a) "; K.L. Seaward et al.; J. Vac Sci. Tech. B6 (6), Nov./Dec. 1988; pp. 1645-1649.
"Selective reactive ion etching for short-gate-length GaAs/AlGaAs/InGaAs pseudomorphic modulation-doped field effect transistors"; A.A. Ketterson et al.; J. Vac.Sci. Tech. B7, (1989). pp. 1493-1496.
"GaAs/AlGaAs HEMTs with sub 0.5 micron gatelength written by E-beam and recessed by dry-etching for direct-coupled FET logic (DCFL)"; A. Hulsmann et al.; Proc. Int. Symp on GaAs and Related Compounds, Jersey (1990); pp. 429-434.
"Electron concentration and mobility loss in GaAs/GaAlAs heterostructures caused by reactive ion etching"; W. Beinstingl et al.; Appl. Phy. Lett 57, (1990); pp. 177-179.
"Selective etching of GaAs and AlGaAs"; C.M. Chang et al.; MRI Bull. Res. Dev. 4 (1990); pp. 95-99.
"Selective etching of GaAs and Al.sub.0.30 Ga.sub.0.70 as with citric/acit/hydrogen peroxide solutions"; C. Juang et al.; J. Vac.Sci Tech B8 (1990); pp. 1122-1124.
"An edge-defined technique for fabricating submicron metal-semiconductor field effect transistor gates"; W.A. Strifler et al.; J. Vac.Sci. Tech B8 (1990); p. 1297.
"Damage studies of dry etched GaAs recessed gates for field effect transistors"; S. Saliman et al.; J.Vac.Sci. Tech B9 (1991); p. 114.
"A comparative study of wet and dry selective etching processes for GaAs/AlGaAs/InGaAs pseudomorphic MODFETs"; M. Tong et al.; J. Elec. Mat. 21 (1992); p. 9.
"AlAs etch-stop layers for InGaAlAs/InP heterostructure devices and circuits"; T.P.E. Broekaert et al.; IEEE Trans. Elec. Dev. 39, (1992); p. 533.
"Dry etch induced damage in GaAs investigated using Raman scattering spectroscopy"; D.G. Lishan et al.; J.Vac.Sci.Tech B7(3), May/Jun. 1989; p. 556.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of fabricating Group III-V compound semiconductor devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating Group III-V compound semiconductor devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating Group III-V compound semiconductor devices will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1361157

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.