Method of fabricating flash EEPROM

Details Method of fabricating flash EEPROM Method of fabricating flash EEPROM

2005-03-22

2005-03-22

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S315000, C257S030000

Reexamination Certificate

active

06870214

ABSTRACT:
A flash EEPROM cell and fabricating method thereof. The cell comprises: a silicon substrate; a silicon pillar layer formed on the silicon substrate; a tunnel insulating film and a floating electrode, formed on the silicon pillar layer; a control gate insulating film and a control gate electrode, formed on the floating electrode; a source region formed in the silicon substrate; a drain region formed on the silicon pillar layer; and bit lines formed on the drain region. The method comprises: providing a silicon substrate; forming a silicon pillar layer on the silicon substrate; forming a tunneling insulating film and a floating electrode; successively forming a control gate insulating film and a control gate electrode; forming a source region and a drain region in the silicon substrate, and on the silicon pillar layer, respectively; and forming bit lines.

REFERENCES:
patent: 5483094 (1996-01-01), Sharma et al.
patent: 6040210 (2000-03-01), Burns et al.
patent: 6232631 (2001-05-01), Schmidt et al.
patent: 6433382 (2002-08-01), Orlowski et al.

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