Method of fabricating dual damascene structure

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S638000

Reexamination Certificate

active

07838415

ABSTRACT:
A method of fabricating a dual damascene structure is described. A dielectric layer and a metal hard mask layer are sequentially formed on a substrate having thereon a conductive layer and a liner layer. The metal hard mask layer and the dielectric layer are patterned to form a via hole exposing a portion of the liner layer. A gap-filling layer is filled in the via hole, having a height of ¼ to ½ of the depth of the via hole. A trench is formed in the metal hard mask layer and the dielectric layer. The gap-filling layer is removed to expose the portion of the liner layer, which is then removed. A metal layer is formed filling in the via hole and the trench, and then the metal hard mask layer is removed.

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Chinese First Examination Report of China Application No. 2007101025699, dated Mar. 27, 2009.

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