Adhesive bonding and miscellaneous chemical manufacture – Methods – Surface bonding and/or assembly therefor
Patent
1997-06-25
1999-08-03
Aftergut, Jeff H.
Adhesive bonding and miscellaneous chemical manufacture
Methods
Surface bonding and/or assembly therefor
156281, 148DIG3, 148DIG12, 148DIG135, 148DIG159, 438455, 438906, 438959, 438964, 438967, 438974, 438977, H01L 21324, H01L 21304
Patent
active
059320486
ABSTRACT:
A method of direct-bonding semiconductor wafers limits the time interval between a bonding step and a bonding anneal step or performs a baking step between the bonding and bonding anneal steps at a predetermined temperature for a predetermined time interval to prevent the formulation of voids on the edge regions of the wafers. The method for fabricating laminated semiconductor wafers includes a bonding step to fit together two polished semiconductor wafers by bonding jigs, and a succeeding bonding anneal step to laminate the wafers. In the method the bonding anneal step is preferably carried out within an hour following the bonding step; or a baking step at a predetermined temperature for a predetermined time interval is carried out between the bonding step and the bonding anneal step. Further, the method can prevent heavy metal impurities attached to the surface of the wafer from diffusing into the wafer by baking the wafer for over 5 minutes at above 100.degree. C. in the period between the bonding step and the annealing step.
REFERENCES:
patent: 4671846 (1987-06-01), Shimbo et al.
patent: 4771046 (1988-09-01), Bajor et al.
patent: 4939101 (1990-07-01), Black et al.
patent: 5169472 (1992-12-01), Goebel
patent: 5236118 (1993-08-01), Bower et al.
patent: 5266824 (1993-11-01), Abe et al.
patent: 5514235 (1996-05-01), Mitani et al.
Haisma, J., et al, Silicon-on-Insulator Wafer Bonding-Wafer Thinning Technological Evaluations, Japanese Journal of Applied Physics, vol. 2, No. 8, pp. 1426-1443, Aug. 1989.
Wiget, R. et al. "Silicon to silicon direct bonding--characterization of the interface and manufacture of p-i-n diodes," Fifth European Conference on Power Electronics and Applications, Brighton, U.K., Sep. 13-16, 1993, pp. 63-68, vol. 2 of 8 (abstract only).
Wiget, R. et al. "Silicon direct bonding (SDB)--substrate to material for electronic devices," Proceedings of 1995 International Conference on Power Electronics and Drive Systems, Singapore, Feb. 21-24, 1995, pp. 75-81 vol. 1 of 2 (abstract only).
Qinyi, T., et al., Acta Electronica Sinica, (Mar. 1991), vol. 19, No. 2, pp. 27-33 (abstract only).
Fujimoto Kazuaki
Furukawa Hiroshi
Kato Hirotaka
Yamamoto Hiroaki
Aftergut Jeff H.
Komatsu Electronic Metals Co. Ltd.
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